CC Robin who knows better than me in case of scheduling model in RISC-V



juzhe.zhong@rivai.ai
 
From: Li Xu
Date: 2024-05-20 15:59
To: gcc-patches
CC: kito.cheng; palmer; tamar.christina; richard.guenther; Richard.Sandiford; juzhe.zhong; zhengyu; pan2.li; xuli
Subject: [PATCH] RISC-V: Enable vectorization for vect-early-break_124-pr114403.c
From: xuli <xuli1@eswincomputing.com>
 
Because "targetm.slow_unaligned_access" is set to true by default
(aka -mtune=rocket) for RISC-V, it causes the __builtin_memcpy with
8 bytes failed to folded into int64 assignment during ccp1.
 
So adding "-mtune=generic-ooo" to the RISC-V target can vectorize
vect-early-break_124-pr114403.c.
 
gcc/testsuite/ChangeLog:
 
* gcc.dg/vect/vect-early-break_124-pr114403.c: Enable vectrization for RISC-V target.
---
gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
 
diff --git a/gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c b/gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c
index 101ae1e0eaa..610b951b262 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c
@@ -1,8 +1,9 @@
/* { dg-add-options vect_early_break } */
/* { dg-require-effective-target vect_early_break_hw } */
/* { dg-require-effective-target vect_long_long } */
+/* { dg-additional-options "-mtune=generic-ooo" { target riscv*-*-* } } */
-/* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" { xfail riscv*-*-* } } } */
+/* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" } } */
#include "tree-vect.h"
@@ -74,4 +75,3 @@ int main ()
   return 0;
}
-
-- 
2.17.1