From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by sourceware.org (Postfix) with ESMTPS id E04EB3858D35 for ; Sat, 25 Mar 2023 19:01:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E04EB3858D35 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pj1-x102a.google.com with SMTP id om3-20020a17090b3a8300b0023efab0e3bfso8053325pjb.3 for ; Sat, 25 Mar 2023 12:01:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679770860; h=content-transfer-encoding:in-reply-to:from:references:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=vbexxdEqYeSiDFXeerUphGUYeTTOKZpbNF+57e2SyZg=; b=Paf22/JyD6r2tSXwHhudABRq8tl6tJaCpIXShYl42m/jiNiJ0PySQaYFgbieg+Eqvz Cr4Q/82dB3osIbLKH/DAl2EQJLGMyaXVg71Zj4VixedWvt7VKZ4Q2dC6NzeuMjeVLcKf weM8tzEIALvI/x2IV12Bvh8U0YyeFKMpc8muBq/6vvRg1QaSv3v88rqLR8kfIhO78BAC SUqYRXjYZ/v2ywqszGiJPFoy4EKfPcnYecG/Rr8MI2fs0bjCF3S7BOEv60WhNZKRPvmF gBXaJwB36c5bjyA7L0pZ1VANwFs0sdyO0lLR9kwAkkbV5U54o8LNSY8sJVBR3MdZFfOE 7VZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679770860; h=content-transfer-encoding:in-reply-to:from:references:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=vbexxdEqYeSiDFXeerUphGUYeTTOKZpbNF+57e2SyZg=; b=vcH8fZDjCF+Go6YsCa6osKzMNIFsryHi9cebn1uO1sYKaYr1zM3BSH7f/hVwJxga8T j0uxZz/njuPz6Iv+UrIz4jzRJe3XlvOASxVQHWdhKtDC32C8kdSKadod5LT2/JP/hm1o uIKeMF8xZvn2A1beM6TCFO2UVxqYs5exatrG0TMv2eP/OYWTnPxAzxLpN+uM4YbmWgr8 WNeqhO35VNHEG2wGYizhLIT9sHi6bFMVwrFUzUNPnCB0YhhcMdRsHcvnocSpryJ/AOyz MU8Gn9SdGmF7rGlxrJb9tFh17Khlaqj89ugn1wa0NfVvDCVahKT1f8FEmN/ElKvJxnLs uEqA== X-Gm-Message-State: AAQBX9fu8L/VnpIFgR2NDSAtAvYzs6fDaRoEtfhKI6viu/VGvsMWJzVj 0K85wCWYl1GFeUnVXscmZEhkbWcEn30= X-Google-Smtp-Source: AKy350bPAdotp64zW0gPETbLQ9ucimqj31IpBMeqt13SfWdGJt6bSnu+nwYFrH63m6YDFSBO9fAWFg== X-Received: by 2002:a17:90b:2241:b0:23d:3698:8ed3 with SMTP id hk1-20020a17090b224100b0023d36988ed3mr7277756pjb.22.1679770860080; Sat, 25 Mar 2023 12:01:00 -0700 (PDT) Received: from ?IPV6:2601:681:8600:13d0::f0a? ([2601:681:8600:13d0::f0a]) by smtp.gmail.com with ESMTPSA id v1-20020a17090a0e0100b0023cfdbb6496sm1802561pje.1.2023.03.25.12.00.59 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 25 Mar 2023 12:00:59 -0700 (PDT) Message-ID: <9aa74d50-a9db-7747-524e-9da839366433@gmail.com> Date: Sat, 25 Mar 2023 13:00:58 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH] RTL: Bugfix for wrong code with v16hi compare & mask Content-Language: en-US To: gcc-patches@gcc.gnu.org References: <20230324141157.1646192-1-pan2.li@intel.com> From: Jeff Law In-Reply-To: <20230324141157.1646192-1-pan2.li@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 3/24/23 08:11, pan2.li--- via Gcc-patches wrote: > From: Pan Li > > Fix the bug of the incorrect code generation for the > below code sample. > > typedef unsigned short __attribute__((__vector_size__ (32))) V; > typedef unsigned short u16; > > void > foo (V m, u16 *ret) > { > V v = 6 > ((V) { 2049, 8 } & m); > *ret = v[0]; // + a + b + c + d; > } > > Before this patch. > addi sp,sp,-64 > ld a5,0(a0) > li a4,528384 > addi a4,a4,-2047 > and a5,a5,a4 > // slli a5,a5,48 <- eliminated by mistake > // srli a5,a5,48 <- eliminated by mistake > sltiu a5,a5,6 > negw a5,a5 > sh a5,0(a1) > > After this patch. > addi sp,sp,-64 > ld a5,0(a0) > li a4,528384 > addi a4,a4,-2047 > and a5,a5,a4 > slli a5,a5,48 > srli a5,a5,48 > sltiu a5,a5,6 > negw a5,a5 > sh a5,0(a1) > > The simplify_comparation for the AND operation will > try to simplify below RTL code from: > (and:DI (subreg:DI (reg:HI 154) 0) (const_int 0x801)) > to: > (subreg:DI (and (reg:HI 154) (const_int 0x801)) 0) These look equivalent to me -- assuming they're used as rvalues. > > If reg:HI 154 is 0x801 and reg:DI 154 is 0x80801, the RTL will > be simplified continuely to: That statement has no meaning. Each pseudo has one and only one native mode and you can only refer to it in that mode. ie reg:HI 154. reg:DI 154 has no meaning. You might say that (subreg:DI (reg:HI 154) 0) has the value 0x80801, but that's OK. The subreg says those bits outside HImode simply don't matter -- you can not depend on them having any particular value. > (subreg:DI (reg:HI 154) 0) I think that's equivalent to (subreg:DI (and:HI (reg:HI 154) (const_int 0x801)) 0) when used as an rvalue. I suspect your problem is elsewhere. jeff