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Fri, 24 May 2024 20:19:34 +0000 (GMT) Message-ID: <9ad3f80e-3d38-44d8-9abf-45c32e3470fe@linux.ibm.com> Date: Fri, 24 May 2024 13:19:34 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/13] rs6000, add overloaded vec_sel with int128 arguments To: "Kewen.Lin" Cc: gcc-patches@gcc.gnu.org, "bergner@linux.ibm.com" , Segher Boessenkool References: <6378d560-df55-4b75-be7b-93dc6b85d81a@linux.ibm.com> <509f5ca2-3a32-42e1-b653-7777ccd2d6d3@linux.ibm.com> <0445f39c-e801-efa7-fb28-bedb7d5532cf@linux.ibm.com> Content-Language: en-US From: Carl Love In-Reply-To: <0445f39c-e801-efa7-fb28-bedb7d5532cf@linux.ibm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 7e4J3uCUZ7kjXr6WqOe4JPfP-qjxiUpU X-Proofpoint-GUID: 7e4J3uCUZ7kjXr6WqOe4JPfP-qjxiUpU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-24_06,2024-05-24_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 malwarescore=0 suspectscore=0 impostorscore=0 mlxscore=0 phishscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405240145 X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,KAM_SHORT,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Kewen: On 5/21/24 20:05, Kewen.Lin wrote: > Hi Carl, > > on 2024/5/22 08:13, Carl Love wrote: >> Kewen: >>> Why did you place this in a section for ISA 3.1 (Power10)? It doesn't really >>> require this support. The used instance VSEL_1TI and VSEL_1TI_UNS are placed >>> in altivec stanza, so it looks that we should put it under the section >>> "PowerPC AltiVec Built-in Functions on ISA 2.05". And since it's an extension >>> of @code{vec_sel} documented in the PVIPR, I prefer to just mention it's "an >>> extension of the @code{vec_sel} built-in documented in the PVIPR" and omitting >>> the description to avoid possible slightly different wording. >> >> Honestly, at this point in time I don't remember why I put it there. It has been too long since I created the patch. That said, the test case requires Power 10 do to the comparison check using built-in vec_all_eq but that is another issue. >> The built-in generates the xxsel instruction that is an ISA 2.06 instruction. So, I would say it should to into the ISA 2.06 section. I moved it to the ISA 2.06 section. > > But the underlying implementation is: > > const vsq __builtin_altivec_vsel_1ti (vsq, vsq, vuq); > VSEL_1TI vector_select_v1ti {} > > const vuq __builtin_altivec_vsel_1ti_uns (vuq, vuq, vuq); > VSEL_1TI_UNS vector_select_v1ti_uns {} > > , it's under altivec stanza and can result with insn vsel (so not xxsel), > vsel is ISA 2.03, so I think ISA 2.05 better matches the implementation. OK, moved to ISA 2.05 > >> >> Sounds like there was some issue that you noticed on r14-10011-g6e62ede7aaccc6. The new version of >> print_i128 should be functionally equivalent but perhaps is "safer"? > > Thanks for checking! Looking into this more closely, I realized you didn't apply the previously > adopted way for printing (the way used in gcc.target/powerpc/builtins-6-p9-runnable.c), sorry for > the false alarm! So your supposed print_i128 is fine to me. OK, no problem. Will go with the original print_i128 function. Carl