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Wed, 29 May 2024 16:01:51 +0000 (GMT) Message-ID: <9c3c08d0-27c8-431f-9356-a9dd28b48820@linux.ibm.com> Date: Wed, 29 May 2024 09:01:51 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/13 ver 3] rs6000, remove duplicated built-ins of vecmergl and, vec_mergeh To: gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , "bergner@linux.ibm.com" References: <59db7e45-e780-4d20-a364-526f9e45800b@linux.ibm.com> Content-Language: en-US From: Carl Love In-Reply-To: <59db7e45-e780-4d20-a364-526f9e45800b@linux.ibm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: VrDJHVbKb-v3Ik4fju4jyirYnREiqVMO X-Proofpoint-ORIG-GUID: VrDJHVbKb-v3Ik4fju4jyirYnREiqVMO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-29_12,2024-05-28_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 malwarescore=0 mlxlogscore=797 phishscore=0 spamscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405290111 X-Spam-Status: No, score=-9.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This was patch 5 in the previous series. It was previously approved. Not changes in this version. Being posted for completeness. Carl ---------------------------------------------------- rs6000, remove duplicated built-ins of vecmergl and vec_mergeh The following undocumented built-ins are same as existing documented overloaded builtins. const vf __builtin_vsx_xxmrghw (vf, vf); same as vf __builtin_vec_mergeh (vf, vf); (overloaded vec_mergeh) const vsi __builtin_vsx_xxmrghw_4si (vsi, vsi); same as vsi __builtin_vec_mergeh (vsi, vsi); (overloaded vec_mergeh) const vf __builtin_vsx_xxmrglw (vf, vf); same as vf __builtin_vec_mergel (vf, vf); (overloaded vec_mergel) const vsi __builtin_vsx_xxmrglw_4si (vsi, vsi); same as vsi __builtin_vec_mergel (vsi, vsi); (overloaded vec_mergel) This patch removes the duplicate built-in definitions so only the documented built-ins will be available for use. The case statements in rs6000_gimple_fold_builtin are removed as they are no longer needed. The patch removes the now unused define_expands for vsx_xxmrghw_ and vsx_xxmrglw_. gcc/ChangeLog: * config/rs6000/rs6000-builtins.def (__builtin_vsx_xxmrghw, __builtin_vsx_xxmrghw_4si, __builtin_vsx_xxmrglw, __builtin_vsx_xxmrglw_4si, __builtin_vsx_xxsel_16qi): Remove built-in definition. * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): remove case entries RS6000_BIF_XXMRGLW_4SI, RS6000_BIF_XXMRGLW_4SF, RS6000_BIF_XXMRGHW_4SI, RS6000_BIF_XXMRGHW_4SF. * config/rs6000/vsx.md (vsx_xxmrghw_, vsx_xxmrglw_): Remove unused define_expands. --- gcc/config/rs6000/rs6000-builtin.cc | 4 --- gcc/config/rs6000/rs6000-builtins.def | 12 -------- gcc/config/rs6000/vsx.md | 41 --------------------------- 3 files changed, 57 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index ac9f16fe51a..f83d65b06ef 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -2097,20 +2097,16 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) /* vec_mergel (integrals). */ case RS6000_BIF_VMRGLH: case RS6000_BIF_VMRGLW: - case RS6000_BIF_XXMRGLW_4SI: case RS6000_BIF_VMRGLB: case RS6000_BIF_VEC_MERGEL_V2DI: - case RS6000_BIF_XXMRGLW_4SF: case RS6000_BIF_VEC_MERGEL_V2DF: fold_mergehl_helper (gsi, stmt, 1); return true; /* vec_mergeh (integrals). */ case RS6000_BIF_VMRGHH: case RS6000_BIF_VMRGHW: - case RS6000_BIF_XXMRGHW_4SI: case RS6000_BIF_VMRGHB: case RS6000_BIF_VEC_MERGEH_V2DI: - case RS6000_BIF_XXMRGHW_4SF: case RS6000_BIF_VEC_MERGEH_V2DF: fold_mergehl_helper (gsi, stmt, 0); return true; diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index 6049f3a4599..13e36df008d 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -1877,18 +1877,6 @@ const signed int __builtin_vsx_xvtsqrtsp_fg (vf); XVTSQRTSP_FG vsx_tsqrtv4sf2_fg {} - const vf __builtin_vsx_xxmrghw (vf, vf); - XXMRGHW_4SF vsx_xxmrghw_v4sf {} - - const vsi __builtin_vsx_xxmrghw_4si (vsi, vsi); - XXMRGHW_4SI vsx_xxmrghw_v4si {} - - const vf __builtin_vsx_xxmrglw (vf, vf); - XXMRGLW_4SF vsx_xxmrglw_v4sf {} - - const vsi __builtin_vsx_xxmrglw_4si (vsi, vsi); - XXMRGLW_4SI vsx_xxmrglw_v4si {} - const vsc __builtin_vsx_xxpermdi_16qi (vsc, vsc, const int<2>); XXPERMDI_16QI vsx_xxpermdi_v16qi {} diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index a8f3d459232..4402b8b01d5 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -4875,47 +4875,6 @@ (define_insn "vsx_xxspltd_" } [(set_attr "type" "vecperm")]) -;; V4SF/V4SI interleave -(define_expand "vsx_xxmrghw_" - [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wa") - (vec_select:VSX_W - (vec_concat: - (match_operand:VSX_W 1 "vsx_register_operand" "wa") - (match_operand:VSX_W 2 "vsx_register_operand" "wa")) - (parallel [(const_int 0) (const_int 4) - (const_int 1) (const_int 5)])))] - "VECTOR_MEM_VSX_P (mode)" -{ - rtx (*fun) (rtx, rtx, rtx); - fun = BYTES_BIG_ENDIAN ? gen_altivec_vmrghw_direct_ - : gen_altivec_vmrglw_direct_; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); - DONE; -} - [(set_attr "type" "vecperm")]) - -(define_expand "vsx_xxmrglw_" - [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wa") - (vec_select:VSX_W - (vec_concat: - (match_operand:VSX_W 1 "vsx_register_operand" "wa") - (match_operand:VSX_W 2 "vsx_register_operand" "wa")) - (parallel [(const_int 2) (const_int 6) - (const_int 3) (const_int 7)])))] - "VECTOR_MEM_VSX_P (mode)" -{ - rtx (*fun) (rtx, rtx, rtx); - fun = BYTES_BIG_ENDIAN ? gen_altivec_vmrglw_direct_ - : gen_altivec_vmrghw_direct_; - if (!BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); - emit_insn (fun (operands[0], operands[1], operands[2])); - DONE; -} - [(set_attr "type" "vecperm")]) - ;; Shift left double by word immediate (define_insn "vsx_xxsldwi_" [(set (match_operand:VSX_L 0 "vsx_register_operand" "=wa") -- 2.45.0