From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.220.28]) by sourceware.org (Postfix) with ESMTPS id 11FA13858437 for ; Mon, 11 Oct 2021 13:39:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 11FA13858437 Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id DDA5F21FE1; Mon, 11 Oct 2021 13:39:47 +0000 (UTC) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id BFF6413C5E; Mon, 11 Oct 2021 13:39:47 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id ZMx5LaM+ZGFaHQAAMHmgww (envelope-from ); Mon, 11 Oct 2021 13:39:47 +0000 Date: Mon, 11 Oct 2021 15:39:47 +0200 (CEST) From: Richard Biener To: gcc-patches@gcc.gnu.org Subject: [PATCH] middle-end/102682 - avoid invalid subreg on the LHS Message-ID: <9n921r2-n5ss-r64o-o4qr-7s7696r591sp@fhfr.qr> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Oct 2021 13:39:50 -0000 The following avoids generating (insn 6 5 7 2 (set (subreg:OI (concatn/v:TI [ (reg:DI 92 [ buffer ]) (reg:DI 93 [ buffer+8 ]) ]) 0) (subreg:OI (reg/v:V8SI 85 [ __x ]) 0)) "t.ii":76:21 74 {*movoi_internal_avx} (nil)) via store_bit_field_1 when we try to store excess data into a register allocated temporary. The case was supposed to /* Use the subreg machinery either to narrow OP0 to the required words... but the check ensured only an register-aligned but not a large enough piece. The following adds such missed check which ends up decomposing the set to (insn 6 5 7 (set (subreg:DI (reg/v:TI 84 [ buffer ]) 0) (subreg:DI (reg/v:V8SI 85 [ __x ]) 0)) "t.ii":76:21 -1 (nil)) (insn 7 6 0 (set (subreg:DI (reg/v:TI 84 [ buffer ]) 8) (subreg:DI (reg/v:V8SI 85 [ __x ]) 8)) "t.ii":76:21 -1 (nil)) Bootstrapped and tested on x86_64-unknown-linux-gnu, OK for trunk? Thanks, Richard. 2021-10-11 Richard Biener PR middle-end/102682 * expmed.c (store_bit_field_1): Ensure a LHS subreg would not create a paradoxical subreg. --- gcc/expmed.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/gcc/expmed.c b/gcc/expmed.c index 59734d4841c..bbdd0e71d20 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -806,7 +806,8 @@ store_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, } } else if (constant_multiple_p (bitnum, regsize * BITS_PER_UNIT, ®num) - && multiple_p (bitsize, regsize * BITS_PER_UNIT)) + && multiple_p (bitsize, regsize * BITS_PER_UNIT) + && known_ge (GET_MODE_BITSIZE (GET_MODE (op0)), bitsize)) { sub = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0), regnum * regsize); -- 2.31.1