From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbgeu2.qq.com (smtpbgeu2.qq.com [18.194.254.142]) by sourceware.org (Postfix) with ESMTPS id 901863858D1E for ; Fri, 10 Nov 2023 08:46:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 901863858D1E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 901863858D1E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=18.194.254.142 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699606010; cv=none; b=xHDrW+M6WJAixhjhqhuAv424t6urDhA44fkBjhgApow+TDalRFf+fS1KdLaPL3/NzRTnwbxHPf16bDeKnON4YRVo3bypTXjmA58pCFYFL/V+R1B5kzDX6MtrWVUUUhJ+wmJYHJ6wiZkaPmUpphdjxzVi3UmRrIs9S+mXoXJQ99I= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699606010; c=relaxed/simple; bh=LgM1TezIOdHnAWsiPgyEfOz06W6TMNUTV7BvKvUHKaE=; h=Message-ID:Date:MIME-Version:Subject:To:From; b=ZcwpJH2fE0F/A6BkZ0YxopmMN2QUOc8/h+8Tc3MI6xkL5dK5RZYuh/mFMnDnhT6SqUgjcB3BbMt78vACHd255SLTEbpFeLf7utWpo6pWOh2hq3IV3rEyirAP/cUHdfPHobHjxN6dI87EmTgSfGUotkU8HUT5v0RQF5CX9m9pfsY= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp81t1699605981t20kgc14 Received: from [10.101.11.9] ( [121.35.180.247]) by bizesmtp.qq.com (ESMTP) with id ; Fri, 10 Nov 2023 16:46:20 +0800 (CST) X-QQ-SSF: 00400000000000C0F000000A0000000 X-QQ-FEAT: oMrTpXn777te1V3yxlcD6zwr/e0CAVJtv/9T5wFsqXa1SFMLBPb19dF4yF0mk TVLfAWiaUvHr320301Q/Zv5xK563dFX2EWnZMoCkKBvr5xAJt6OKAkwoOe3m45LKQdlDzfr 2/qU18eTNRJ1of+xdwTfDh/EeldfyPsw1etTeEoiwsfiEvCqvBs1iQvOe7QhdryIECy86SG QCygcle40+fmRMZcGGt1vyob33lv/oy3PmRXh6n7DpPmNU5ieI4G+Vc/BNIsVM+wEI9WaSL OOhZOR1JXIohAL4Ykl0BC355nydqaWtMvlr+Q8DZc2NkyuBxLfvI4UMRNqeIvm7PDjpCAHA cOOLDWusjOPj1gidKIuJgJxHKJgLXpXg7DtJrcE1/mM7iAmMIQ= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 2202540290795350586 Message-ID: Date: Fri, 10 Nov 2023 16:46:21 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/7] ira/lra: Support subreg coalesce Content-Language: en-US To: Dimitar Dimitrov Cc: gcc-patches@gcc.gnu.org, vmakarov@redhat.com, richard.sandiford@arm.com, juzhe.zhong@rivai.ai References: <20231108034740.834590-1-lehua.ding@rivai.ai> From: Lehua Ding In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz6a-0 X-Spam-Status: No, score=0.0 required=5.0 tests=BAYES_00,FORGED_MUA_MOZILLA,KAM_DMARC_STATUS,RCVD_IN_BARRACUDACENTRAL,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE,T_SPF_HELO_TEMPERROR,URIBL_SBL_A,WEIRD_PORT autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi Dimitar, Thanks for the tests. > This patch set breaks the build for at least three embedded targets. See > below. > > For avr the GCC build fails with: > /mnt/nvme/dinux/local-workspace/gcc/gcc/ira-lives.cc:149:39: error: call of overloaded ‘set_subreg_conflict_hard_regs(ira_allocno*&, int&)’ is ambiguous > 149 | set_subreg_conflict_hard_regs (OBJECT_ALLOCNO (obj), regno); I think it's because `HARD_REG_SET` and `unsigned int` are of the same type on avr target(i.e. No more than 32 registers on avr target), so these two bellow function prototypes conflict, I'll adjust it. static void set_subreg_conflict_hard_regs (ira_allocno_t a, HARD_REG_SET regs) static void set_subreg_conflict_hard_regs (ira_allocno_t a, unsigned int regno) > For arm-none-eabi the newlib build fails with: > /mnt/nvme/dinux/local-workspace/newlib/newlib/libm/math/e_jn.c:279:1: internal compiler error: Floating point exception > 279 | } > | ^ > 0x1176e0f crash_signal > /mnt/nvme/dinux/local-workspace/gcc/gcc/toplev.cc:316 > 0xf6008d get_range_hard_regs(int, subreg_range const&) > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:609 > 0xf6008d get_range_hard_regs(int, subreg_range const&) > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:601 > 0xf60312 new_insn_reg > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:658 > 0xf6064d add_regs_to_insn_regno_info > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1623 > 0xf62909 lra_update_insn_regno_info(rtx_insn*) > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1769 > 0xf62e46 lra_update_insn_regno_info(rtx_insn*) > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1762 > 0xf62e46 lra_push_insn_1 > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1919 > 0xf62f2d lra_push_insn(rtx_insn*) > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1927 > 0xf62f2d push_insns > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1970 > 0xf63302 push_insns > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1966 > 0xf63302 lra(_IO_FILE*) > /mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:2511 > 0xf0e399 do_reload > /mnt/nvme/dinux/local-workspace/gcc/gcc/ira.cc:5960 > 0xf0e399 execute > /mnt/nvme/dinux/local-workspace/gcc/gcc/ira.cc:6148 > > The divide by zero error above is interesting. I'm not sure why ira_reg_class_max_nregs[] yields 0 for the pseudo register 168 in the following rtx: > (debug_insn 168 167 169 19 (var_location:SI encoding (reg/v:SI 168 [ encoding ])) -1 > (nil)) I just cross compiled an arm-none-eabi compiler and didn't encounter this error, can you give me a little more config info about build? For example, flags_for_target, etc. Thanks again. -- Best, Lehua (RiVAI) lehua.ding@rivai.ai