From: Carrot Wei <carrot@google.com>
To: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH: PR target/44999] Replace "and r0, r0, #255" with uxtb in thumb2
Date: Mon, 26 Jul 2010 06:40:00 -0000 [thread overview]
Message-ID: <AANLkTikuSLgstDH912O76=p=ffAa_8r99uuYywu9jWo1@mail.gmail.com> (raw)
In-Reply-To: <AANLkTinA9B9PuMdEvoNG4h7wnRd9egzqBNuUChFMJ+S1@mail.gmail.com>
ping
On Thu, Jul 22, 2010 at 3:11 PM, Carrot Wei <carrot@google.com> wrote:
> In thumb2 "and r0, r0, #255" is 32 bit, uxtb is 16 bit and does the same
> operation. This patch simply detect the situation in pattern "andsi3" and call
> gen_thumb2_zero_extendqisi2_v6.
>
> Tested on arm qemu.
>
> ChangeLog:
> 2010-07-22 Wei Guozhi <carrot@google.com>
>
> PR target/44999
> * config/arm/arm.md (andsi3): Change to zero extension if possible.
> * config/arm/thumb2.md (thumb2_zero_extendqisi2_v6): Change the name.
>
> ChangeLog:
> 2010-07-22 Wei Guozhi <carrot@google.com>
>
> PR target/44999
> * gcc.target/arm/pr44999.c: New testcase.
>
>
> Index: thumb2.md
> ===================================================================
> --- thumb2.md (revision 162396)
> +++ thumb2.md (working copy)
> @@ -970,7 +970,7 @@
> (set_attr "neg_pool_range" "*,250")]
> )
>
> -(define_insn "*thumb2_zero_extendqisi2_v6"
> +(define_insn "thumb2_zero_extendqisi2_v6"
> [(set (match_operand:SI 0 "s_register_operand" "=r,r")
> (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
> "TARGET_THUMB2 && arm_arch6"
>
>
> Index: arm.md
> ===================================================================
> --- arm.md (revision 162396)
> +++ arm.md (working copy)
> @@ -1933,9 +1933,16 @@
> {
> if (GET_CODE (operands[2]) == CONST_INT)
> {
> - arm_split_constant (AND, SImode, NULL_RTX,
> - INTVAL (operands[2]), operands[0],
> - operands[1], optimize && can_create_pseudo_p ());
> + if (INTVAL (operands[2]) == 255 && arm_arch6)
> + {
> + operands[1] = gen_rtx_SUBREG (QImode, operands[1], 0);
> + gen_thumb2_zero_extendqisi2_v6 (operands[0], operands[1]);
> + }
> + else
> + arm_split_constant (AND, SImode, NULL_RTX,
> + INTVAL (operands[2]), operands[0],
> + operands[1],
> + optimize && can_create_pseudo_p ());
>
> DONE;
> }
>
>
> Index: pr44999.c
> ===================================================================
> --- pr44999.c (revision 0)
> +++ pr44999.c (revision 0)
> @@ -0,0 +1,7 @@
> +/* { dg-options "-march=armv7-a -mthumb -Os" } */
> +/* { dg-final { scan-assembler "uxtb" } } */
> +
> +int tp(int x, int y)
> +{
> + return (x & 0xff) - (y & 0xffff);
> +}
>
next prev parent reply other threads:[~2010-07-26 6:40 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-22 7:11 Carrot Wei
2010-07-26 6:40 ` Carrot Wei [this message]
2010-07-26 7:23 ` Paolo Bonzini
2010-07-26 9:09 ` Carrot Wei
2010-07-26 9:22 ` Paolo Bonzini
2010-07-30 7:08 ` Carrot Wei
2010-08-09 4:00 ` Carrot Wei
2010-08-10 9:10 ` Nick Clifton
2010-08-10 14:10 ` Richard Earnshaw
2010-08-09 10:38 ` Richard Earnshaw
2010-08-11 1:16 ` Carrot Wei
2010-08-11 8:59 ` Richard Earnshaw
2010-11-03 13:09 ` Paul Brook
2010-11-07 14:21 ` Carrot Wei
2010-11-08 12:02 ` Paul Brook
2010-11-09 7:17 ` Carrot Wei
2010-11-09 11:19 ` Paul Brook
2010-11-16 5:04 ` Carrot Wei
2010-11-16 5:57 ` Paolo Bonzini
2010-11-19 3:46 ` Carrot Wei
2010-12-02 9:07 ` Richard Earnshaw
2010-12-03 23:08 ` Carrot Wei
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