From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23338 invoked by alias); 14 Feb 2011 19:51:01 -0000 Received: (qmail 23329 invoked by uid 22791); 14 Feb 2011 19:51:00 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from mail-qw0-f47.google.com (HELO mail-qw0-f47.google.com) (209.85.216.47) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 14 Feb 2011 19:50:56 +0000 Received: by qwi2 with SMTP id 2so3461022qwi.20 for ; Mon, 14 Feb 2011 11:50:54 -0800 (PST) MIME-Version: 1.0 Received: by 10.224.2.74 with SMTP id 10mr3664293qai.119.1297713020468; Mon, 14 Feb 2011 11:50:20 -0800 (PST) Received: by 10.224.20.5 with HTTP; Mon, 14 Feb 2011 11:50:20 -0800 (PST) In-Reply-To: <4D598613.8040808@codesourcery.com> References: <20110214185738.GA13004@intel.com> <4D597E72.8030806@redhat.com> <201102142021.03117.ebotcazou@adacore.com> <4D598613.8040808@codesourcery.com> Date: Mon, 14 Feb 2011 19:54:00 -0000 Message-ID: Subject: Re: [x32] PATCH: PR middle-end/47725: [x32] error: unable to find a register to spill in class DIREG From: "H.J. Lu" To: Bernd Schmidt Cc: Eric Botcazou , Jeff Law , gcc-patches@gcc.gnu.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-02/txt/msg00921.txt.bz2 On Mon, Feb 14, 2011 at 11:44 AM, Bernd Schmidt w= rote: > On 02/14/2011 08:21 PM, Eric Botcazou wrote: >>> So all you're doing is trading one performance issue for another. >> >> If adding a copy to a new pseudo was really a performance issue, we woul= d have >> many issues thoughout the compiler. =A0AFAIK it's a classical trick. > > The insns we're dealing with here can potentially get REG_EQUIV notes > attached to them, so they're a bit special. At least it needs to be > verified that the optimization in IRA which moves such insns before > their only use still triggers (PR42235). > > I agree with Jeff that combine would be the correct place to fix this. > At least it takes class_likely_spilled_p into account, so it will > restrict only those machines where extending the lifetime of hard regs > is dangerous. > Hi Jeff, Bernd, Does my patch at http://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D47725#c3 do what you suggested? --=20 H.J.