From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3127 invoked by alias); 1 Apr 2011 19:42:07 -0000 Received: (qmail 3112 invoked by uid 22791); 1 Apr 2011 19:42:07 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from mail-iw0-f175.google.com (HELO mail-iw0-f175.google.com) (209.85.214.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 01 Apr 2011 19:42:03 +0000 Received: by iwn10 with SMTP id 10so5007411iwn.20 for ; Fri, 01 Apr 2011 12:42:02 -0700 (PDT) MIME-Version: 1.0 Received: by 10.42.29.202 with SMTP id s10mr5632079icc.4.1301686922381; Fri, 01 Apr 2011 12:42:02 -0700 (PDT) Received: by 10.42.72.196 with HTTP; Fri, 1 Apr 2011 12:42:02 -0700 (PDT) In-Reply-To: <4D95FC41.5060003@redhat.com> References: <4D92103E.90100@redhat.com> <4D933A2E.9030105@redhat.com> <4D949416.5000307@redhat.com> <4D95FC41.5060003@redhat.com> Date: Fri, 01 Apr 2011 19:42:00 -0000 Message-ID: Subject: Re: [cxx-mem-model] bitfield tests From: Andrew Pinski To: Richard Henderson Cc: Richard Guenther , Jeff Law , Aldy Hernandez , gcc-patches , Jakub Jelinek Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-04/txt/msg00086.txt.bz2 On Fri, Apr 1, 2011 at 9:24 AM, Richard Henderson wrote: > (1) Do we agree that all such cpus have user-level store insns with byte > =C2=A0 =C2=A0granularity. =C2=A0Honestly the only non-microcontroler I ev= er heard of > =C2=A0 =C2=A0without this was the original Alpha. =C2=A0Which is excluded= per (0). And SPU which is excluded per (0) based on it is not a SMP but rather AMP as it does not share memory. -- Pinski