From: David Edelsohn <dje.gcc@gmail.com>
To: Nathan Froyd <froydnj@codesourcery.com>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH,rs6000] disable mfcr pattern for TARGET_ISEL
Date: Wed, 21 Jul 2010 15:32:00 -0000 [thread overview]
Message-ID: <AANLkTinlp-JyQ_gdxa8XtkkrPVIb_2GoXfwnhRc7DKSV@mail.gmail.com> (raw)
In-Reply-To: <20100720204506.GN26037@codesourcery.com>
On Tue, Jul 20, 2010 at 4:45 PM, Nathan Froyd <froydnj@codesourcery.com> wrote:
> mfcr can be a slow instruction, particular for multiple-issue
> processors, where it requires serializing the instruction stream to
> ensure that CR has been properly updated. The primary pattern where
> mfcr occurs deals with moving an individual bit from CR to a GPR. This
> pattern not only uses mfcr, but also binds the mfcr and accompanying
> rlwinm together instead of permitting them to be scheduled separately.
>
> On TARGET_ISEL processors, however, we can improve the matter somewhat
> by using isel instead of mfcr. With isel, there's no need to
> synchronize on CR as a whole, just an individual field. The
> instructions that load zero and one can also be scheduled separately
> from the isel itself. The patch below enables this improvement by
> turning off the aforementioned mfcr/rlwinm pattern for TARGET_ISEL
> processors.
>
> The patch could be improved; there's a TARGET_POWERPC64 pattern that's
> identical save for the modes of registers slightly further on in the
> file. I don't have a power7 system to test the equivalent 64-bit path
> on, but if somebody was willing to test on such a system for me, I could
> tweak the patch accordingly. (Such a tweaked patch could also use mode
> iterators, which would be an improvement.)
>
> Tested with cross to powerpc-eabispe. OK to commit?
>
> -Nathan
>
> * config/rs6000/rs6000.md (define_insn ""): Enable only for
> !TARGET_ISEL targets.
First, the ChangeLog needs a better identifier. define_insn "" ? At
least add a "*" name to the unnamed pattern.
Do processors with TARGET_ISEL also implement MFCRF? mfcrf does not
have the same expense as mfcr. There may be other reasons to use ISEL
more aggressively, but I am surprised that this would be a problem on
embedded processors with ISEL. Is this for old processors with ISEL
or did new processors not enable TARGET_MFCRF in GCC?
Thanks, David
next prev parent reply other threads:[~2010-07-21 15:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-20 20:45 Nathan Froyd
2010-07-21 15:32 ` David Edelsohn [this message]
2010-07-21 15:51 ` Nathan Froyd
2010-07-21 16:34 ` David Edelsohn
2010-07-21 16:49 ` Nathan Froyd
[not found] ` <AANLkTikqRe1aGizRF4tJhL+roXnQzWa8bu1B2X44ERra@mail.gmail.com>
2010-07-26 17:14 ` Nathan Froyd
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