From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 106547 invoked by alias); 15 Dec 2015 17:20:46 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 106525 invoked by uid 89); 15 Dec 2015 17:20:45 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (207.82.80.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 15 Dec 2015 17:20:43 +0000 Received: from emea01-db3-obe.outbound.protection.outlook.com (mail-db3lrp0084.outbound.protection.outlook.com [213.199.154.84]) (Using TLS) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-24--wvBLEuESLiQAayHZrPqVw-1; Tue, 15 Dec 2015 17:20:38 +0000 Received: from AM3PR08MB0088.eurprd08.prod.outlook.com (2a01:111:e400:8847::18) by AM3PR08MB0595.eurprd08.prod.outlook.com (2a01:111:e400:c408::17) with Microsoft SMTP Server (TLS) id 15.1.361.13; Tue, 15 Dec 2015 17:20:35 +0000 Received: from AM3PR08MB0088.eurprd08.prod.outlook.com ([fe80::5c7b:335e:6049:3647]) by AM3PR08MB0088.eurprd08.prod.outlook.com ([fe80::5c7b:335e:6049:3647%14]) with mapi id 15.01.0355.012; Tue, 15 Dec 2015 17:20:35 +0000 From: Wilco Dijkstra To: James Greenhalgh , Bernd Schmidt CC: "gcc-patches@gcc.gnu.org" , nd Subject: RE: [PATCH 2/4 v2][AArch64] Add support for FCCMP Date: Tue, 15 Dec 2015 17:20:00 -0000 Message-ID: References: <20151215164210.GA35075@arm.com> In-Reply-To: <20151215164210.GA35075@arm.com> x-microsoft-exchange-diagnostics: 1;AM3PR08MB0595;5:IfkBoc6q/Qm98+ChwL57AwIsT2j6LHICPMDaf4L+xSJETx7xaN+TWblCeCpQ3hUH+N8+2sxRQHdTfNqhnfGYkBcNnOkWD4T+nEhvgJV/LFtTu7d2I8rjaiWaojZ4xBT/vuwKiQ/WNtBx8dzDbcM2fg==;24:rsqErqh0eoZ+k3tK7PvfyIUoqk9q0XIJYZsI4HeOHVIZIIqocT58uF3+T1YxTlXbfwEApKoRbXKZXAHrBbanqu1MJTi6rPCmansc/1FNxLg=;20:JL7Rfg4eIVqGg4plTGPTEIZfJd6XNOYpaSL4CbBahRUEkQicOiT8HvZ/zQ11dR7nkrt0cDrO9Pk71tYPen5Dpl/B/m9Isbn9/jOqqGN1lXfE4CdruDGYaP/LtVgcXMFdv7GsOWS/YAbwxyjPV2J2KS15AOUvozEVHLQPlF9NfiE= x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:AM3PR08MB0595; nodisclaimer: True x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(180628864354917); x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(2401047)(8121501046)(520078)(5005006)(10201501046)(3002001);SRVR:AM3PR08MB0595;BCL:0;PCL:0;RULEID:;SRVR:AM3PR08MB0595; x-forefront-prvs: 07915F544A x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(24454002)(199003)(54534003)(13464003)(189002)(377424004)(76576001)(2950100001)(2900100001)(11100500001)(1220700001)(586003)(92566002)(1096002)(3846002)(4001150100001)(102836003)(6116002)(5004730100002)(5008740100001)(5250100002)(40100003)(87936001)(106356001)(105586002)(189998001)(5001960100002)(54356999)(50986999)(19580395003)(5003600100002)(33656002)(19580405001)(76176999)(5002640100001)(66066001)(86362001)(5001770100001)(101416001)(74316001)(97736004)(81156007);DIR:OUT;SFP:1101;SCL:1;SRVR:AM3PR08MB0595;H:AM3PR08MB0088.eurprd08.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;A:1;MX:1;LANG:en; spamdiagnosticoutput: 1:23 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Dec 2015 17:20:35.6930 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM3PR08MB0595 X-MC-Unique: -wvBLEuESLiQAayHZrPqVw-1 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable X-SW-Source: 2015-12/txt/msg01504.txt.bz2 Adding Bernd - would you mind reviewing the ccmp.c change please? > -----Original Message----- > From: James Greenhalgh [mailto:james.greenhalgh@arm.com] > Sent: 15 December 2015 16:42 > To: Wilco Dijkstra > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH 2/4 v2][AArch64] Add support for FCCMP >=20 > On Tue, Dec 15, 2015 at 10:32:50AM +0000, Wilco Dijkstra wrote: > > ping > > > > > -----Original Message----- > > > From: Wilco Dijkstra [mailto:Wilco.Dijkstra@arm.com] > > > Sent: 17 November 2015 18:36 > > > To: gcc-patches@gcc.gnu.org > > > Subject: [PATCH 2/4 v2][AArch64] Add support for FCCMP > > > > > > (v2 version removes 4 enums) > > > > > > This patch adds support for FCCMP. This is trivial with the new CCMP = representation - remove the restriction of FP in ccmp.c and > add > > > FCCMP patterns. Add a test to ensure FCCMP/FCCMPE are emitted as expe= cted. > > > > > > OK for commit? >=20 > The AArch64 code-generation parts of this are OK, though please wait for > an OK on the ccmp.c changes before committing, and please revisit the > testcase. >=20 > Sorry that this took a long time to get to. No problem. > > > ChangeLog: > > > 2015-11-18 Wilco Dijkstra > > > > > > * gcc/ccmp.c (ccmp_candidate_p): Remove integer-only restriction. >=20 > Drop the gcc/ from the paths here and below. >=20 > > > * gcc/config/aarch64/aarch64.md (fccmp): New pattern. > > > (fccmpe): Likewise. > > > (fcmp): Rename to fcmp and globalize pattern. > > > (fcmpe): Likewise. > > > * gcc/config/aarch64/aarch64.c (aarch64_gen_ccmp_first): Add FP supp= ort. > > > (aarch64_gen_ccmp_next): Add FP support. > > > > > > gcc/testsuite/ > > > * gcc.target/aarch64/ccmp_1.c: New testcase. >=20 > This testcase doesn't look very helpful to me. You only end up checking if > *any* of the tests compile to fccmp/fccmpe rather than *all* the tests. S= hould > this use a scan-assembler-times directive to count the number of times a > particular instruction appears? There are no costs involved so there is no guarantee which CCMPs we will see generated. After patch 3 and 4, the order is better defined and the testcas= e is updated to reflect what we expect to be generated. The alternative would be to not add the testcase here, but in part 4. Howev= er in internal review it was requested to add it to this part of the patch... Wilco > > > --- > > > gcc/ccmp.c | 6 --- > > > gcc/config/aarch64/aarch64.c | 24 +++++++++ > > > gcc/config/aarch64/aarch64.md | 34 ++++++++++++- > > > gcc/testsuite/gcc.target/aarch64/ccmp_1.c | 84 +++++++++++++++++++++= ++++++++++ > > > 4 files changed, 140 insertions(+), 8 deletions(-) > > > create mode 100644 gcc/testsuite/gcc.target/aarch64/ccmp_1.c > > > > > > diff --git a/gcc/ccmp.c b/gcc/ccmp.c > > > index 58ac126..3698a7d 100644 > > > --- a/gcc/ccmp.c > > > +++ b/gcc/ccmp.c > > > @@ -112,12 +112,6 @@ ccmp_candidate_p (gimple *g) > > > || gimple_bb (gs0) !=3D gimple_bb (g)) > > > return false; > > > > > > - if (!(INTEGRAL_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs0))) > > > - || POINTER_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs0)))) > > > - || !(INTEGRAL_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs1))) > > > - || POINTER_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs1))))) > > > - return false; > > > - > > > tcode0 =3D gimple_assign_rhs_code (gs0); > > > tcode1 =3D gimple_assign_rhs_code (gs1); > > > if (TREE_CODE_CLASS (tcode0) =3D=3D tcc_comparison > > > diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch6= 4.c > > > index c8bee3b..db4d190 100644 > > > --- a/gcc/config/aarch64/aarch64.c > > > +++ b/gcc/config/aarch64/aarch64.c > > > @@ -12398,6 +12398,18 @@ aarch64_gen_ccmp_first (rtx *prep_seq, rtx *= gen_seq, > > > icode =3D CODE_FOR_cmpdi; > > > break; > > > > > > + case SFmode: > > > + cmp_mode =3D SFmode; > > > + cc_mode =3D aarch64_select_cc_mode ((rtx_code) code, op0, op1); > > > + icode =3D cc_mode =3D=3D CCFPEmode ? CODE_FOR_fcmpesf : CODE_F= OR_fcmpsf; > > > + break; > > > + > > > + case DFmode: > > > + cmp_mode =3D DFmode; > > > + cc_mode =3D aarch64_select_cc_mode ((rtx_code) code, op0, op1); > > > + icode =3D cc_mode =3D=3D CCFPEmode ? CODE_FOR_fcmpedf : CODE_F= OR_fcmpdf; > > > + break; > > > + > > > default: > > > end_sequence (); > > > return NULL_RTX; > > > @@ -12461,6 +12473,18 @@ aarch64_gen_ccmp_next (rtx *prep_seq, rtx *g= en_seq, rtx prev, int cmp_code, > > > icode =3D CODE_FOR_ccmpdi; > > > break; > > > > > > + case SFmode: > > > + cmp_mode =3D SFmode; > > > + cc_mode =3D aarch64_select_cc_mode ((rtx_code) cmp_code, op0, = op1); > > > + icode =3D cc_mode =3D=3D CCFPEmode ? CODE_FOR_fccmpesf : CODE_= FOR_fccmpsf; > > > + break; > > > + > > > + case DFmode: > > > + cmp_mode =3D DFmode; > > > + cc_mode =3D aarch64_select_cc_mode ((rtx_code) cmp_code, op0, = op1); > > > + icode =3D cc_mode =3D=3D CCFPEmode ? CODE_FOR_fccmpedf : CODE_= FOR_fccmpdf; > > > + break; > > > + > > > default: > > > end_sequence (); > > > return NULL_RTX; > > > diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch= 64.md > > > index fab65c6..7d728b5 100644 > > > --- a/gcc/config/aarch64/aarch64.md > > > +++ b/gcc/config/aarch64/aarch64.md > > > @@ -279,6 +279,36 @@ > > > [(set_attr "type" "alus_sreg,alus_imm,alus_imm")] > > > ) > > > > > > +(define_insn "fccmp" > > > + [(set (match_operand:CCFP 1 "cc_register" "") > > > + (if_then_else:CCFP > > > + (match_operator 4 "aarch64_comparison_operator" > > > + [(match_operand 0 "cc_register" "") > > > + (const_int 0)]) > > > + (compare:CCFP > > > + (match_operand:GPF 2 "register_operand" "w") > > > + (match_operand:GPF 3 "register_operand" "w")) > > > + (match_operand 5 "immediate_operand")))] > > > + "TARGET_FLOAT" > > > + "fccmp\\t%2, %3, %k5, %m4" > > > + [(set_attr "type" "fcmp")] > > > +) > > > + > > > +(define_insn "fccmpe" > > > + [(set (match_operand:CCFPE 1 "cc_register" "") > > > + (if_then_else:CCFPE > > > + (match_operator 4 "aarch64_comparison_operator" > > > + [(match_operand 0 "cc_register" "") > > > + (const_int 0)]) > > > + (compare:CCFPE > > > + (match_operand:GPF 2 "register_operand" "w") > > > + (match_operand:GPF 3 "register_operand" "w")) > > > + (match_operand 5 "immediate_operand")))] > > > + "TARGET_FLOAT" > > > + "fccmpe\\t%2, %3, %k5, %m4" > > > + [(set_attr "type" "fcmp")] > > > +) > > > + > > > ;; Expansion of signed mod by a power of 2 using CSNEG. > > > ;; For x0 % n where n is a power of 2 produce: > > > ;; negs x1, x0 > > > @@ -2794,7 +2824,7 @@ > > > [(set_attr "type" "alus_sreg,alus_imm,alus_imm")] > > > ) > > > > > > -(define_insn "*cmp" > > > +(define_insn "fcmp" > > > [(set (reg:CCFP CC_REGNUM) > > > (compare:CCFP (match_operand:GPF 0 "register_operand" "w,w") > > > (match_operand:GPF 1 "aarch64_fp_compare_operand" "Y,w")))] > > > @@ -2805,7 +2835,7 @@ > > > [(set_attr "type" "fcmp")] > > > ) > > > > > > -(define_insn "*cmpe" > > > +(define_insn "fcmpe" > > > [(set (reg:CCFPE CC_REGNUM) > > > (compare:CCFPE (match_operand:GPF 0 "register_operand" "w,w") > > > (match_operand:GPF 1 "aarch64_fp_compare_operand" "Y,w")))] > > > diff --git a/gcc/testsuite/gcc.target/aarch64/ccmp_1.c b/gcc/testsuit= e/gcc.target/aarch64/ccmp_1.c > > > new file mode 100644 > > > index 0000000..ef077e0 > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/aarch64/ccmp_1.c > > > @@ -0,0 +1,84 @@ > > > +/* { dg-do compile } */ > > > +/* { dg-options "-O2" } */ > > > + > > > +int > > > +f1 (int a) > > > +{ > > > + return a =3D=3D 17 || a =3D=3D 32; > > > +} > > > + > > > +int > > > +f2 (int a) > > > +{ > > > + return a =3D=3D 33 || a =3D=3D 18; > > > +} > > > + > > > +int > > > +f3 (int a, int b) > > > +{ > > > + return a =3D=3D 19 && b =3D=3D 34; > > > +} > > > + > > > +int > > > +f4 (int a, int b) > > > +{ > > > + return a =3D=3D 35 && b =3D=3D 20; > > > +} > > > + > > > +int > > > +f5 (int a) > > > +{ > > > + return a =3D=3D 0 || a =3D=3D 5; > > > +} > > > + > > > +int > > > +f6 (int a) > > > +{ > > > + return a =3D=3D 6 || a =3D=3D 0; > > > +} > > > + > > > +int > > > +f7 (int a, int b) > > > +{ > > > + return a =3D=3D 0 && b =3D=3D 7; > > > +} > > > + > > > +int > > > +f8 (int a, int b) > > > +{ > > > + return a =3D=3D 9 && b =3D=3D 0; > > > +} > > > + > > > +int > > > +f9 (float a, float b) > > > +{ > > > + return a < 0.0f && a > b; > > > +} > > > + > > > +int > > > +f10 (float a, float b) > > > +{ > > > + return a =3D=3D b || b =3D=3D 0.0f; > > > +} > > > + > > > +int > > > +f11 (double a, int b) > > > +{ > > > + return a < 0.0f && b =3D=3D 30; > > > +} > > > + > > > +int > > > +f12 (double a, int b) > > > +{ > > > + return b =3D=3D 31 || a =3D=3D 0.0f; > > > +} > > > + > > > +int > > > +f13 (int a, int b) > > > +{ > > > + a +=3D b; > > > + return a =3D=3D 3 || a =3D=3D 0; > > > +} > > > + > > > +/* { dg-final { scan-assembler "fccmp\t" } } */ > > > +/* { dg-final { scan-assembler "fccmpe\t" } } */ > > > -- > > > 1.9.1 > >