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Tue, 17 Jan 2017 12:16:27 +0000 Received: from AM5PR0802MB2610.eurprd08.prod.outlook.com ([10.175.46.18]) by AM5PR0802MB2610.eurprd08.prod.outlook.com ([10.175.46.18]) with mapi id 15.01.0860.012; Tue, 17 Jan 2017 12:16:27 +0000 From: Wilco Dijkstra To: GCC Patches , Richard Earnshaw CC: nd Subject: Re: [PATCH][ARM] Improve max_insns_skipped logic Date: Tue, 17 Jan 2017 12:16:00 -0000 Message-ID: References: ,, In-Reply-To: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Wilco.Dijkstra@arm.com; x-ms-office365-filtering-correlation-id: 74b82b10-8768-4c7e-58fd-08d43ed2a9a0 x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001);SRVR:AM5PR0802MB2386; x-microsoft-exchange-diagnostics: 1;AM5PR0802MB2386;7:ij1uLU5oBhD6FZjk3QAWAfWgWjvKvCY++KEn3OEhQBPiU4v7jo4OnZBXCYerm9runnvNiKfENBA/CWsswzt33l6S/1OHRLfKLoTrpDVVnCowA5OSTatrmsUBvogFktyHidgFjlVVgx6pzJEHudVJBlsiLkLxeZ62s6FCaEQ0q1IXqNFnde8hGYnHJpzUFnBSJZql36EAGdFaNqHlR5X6Pbcx/1Ge589S6pfnWwHjS7z460oyOwuuuwfbeZCcr9Ko1olpgQwU1Eslk/U0Ov0I6tXeAPse7AZXpskeOvD7WH2U4fqi6JDNPbyGpY9zs9THfRRpXY1DXsoUhRCmtqXlYT5eIvHernwgTTtX3B3e7csFCAoLQCgZ6C88E405hmywGfFNqP4rWLn/gZN3edMDNj+jS2ao3JG3hl4UqIhnqlOXH9oK+Qp3pVAvenzi5y9VAmHFkuHzbWcVEAcU9IOjeg== nodisclaimer: True x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(180628864354917); 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received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-originalarrivaltime: 17 Jan 2017 12:16:27.4373 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR0802MB2386 X-SW-Source: 2017-01/txt/msg01191.txt.bz2 ping From: Wilco Dijkstra Sent: 10 November 2016 17:19 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Improve max_insns_skipped logic =A0=A0=A0=20 Improve the logic when setting max_insns_skipped.=A0 Limit the maximum size= of IT to MAX_INSN_PER_IT_BLOCK as otherwise multiple IT instructions are needed, increasing codesize.=A0 Given 4 works well for Thumb-2, use the same limit = for ARM for consistency.=20 ChangeLog: 2016-11-04=A0 Wilco Dijkstra=A0 =A0=A0=A0=A0=A0=A0=A0 * config/arm/arm.c (arm_option_params_internal): Impr= ove setting of =A0=A0=A0=A0=A0=A0=A0 max_insns_skipped. -- diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index f046854e9665d54911616fc1c60fee407188f7d6..29e8d1d07d918fbb2a627a65351= 0dfc8587ee01a 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2901,20 +2901,12 @@ arm_option_params_internal (void) =A0=A0=A0=A0=A0=A0 targetm.max_anchor_offset =3D TARGET_MAX_ANCHOR_OFFSET; =A0=A0=A0=A0 } =A0 -=A0 if (optimize_size) -=A0=A0=A0 { -=A0=A0=A0=A0=A0 /* If optimizing for size, bump the number of instructions= that we -=A0=A0=A0=A0=A0=A0=A0=A0 are prepared to conditionally execute (even on a = StrongARM).=A0 */ -=A0=A0=A0=A0=A0 max_insns_skipped =3D 6; +=A0 /* Increase the number of conditional instructions with -Os.=A0 */ +=A0 max_insns_skipped =3D optimize_size ? 4 : current_tune->max_insns_skip= ped; =A0 -=A0=A0=A0=A0=A0 /* For THUMB2, we limit the conditional sequence to one IT= block.=A0 */ -=A0=A0=A0=A0=A0 if (TARGET_THUMB2) -=A0=A0=A0=A0=A0=A0=A0 max_insns_skipped =3D arm_restrict_it ? 1 : 4; -=A0=A0=A0 } -=A0 else -=A0=A0=A0 /* When -mrestrict-it is in use tone down the if-conversion.=A0 = */ -=A0=A0=A0 max_insns_skipped =3D (TARGET_THUMB2 && arm_restrict_it) -=A0=A0=A0=A0=A0 ? 1 : current_tune->max_insns_skipped; +=A0 /* For THUMB2, we limit the conditional sequence to one IT block.=A0 */ +=A0 if (TARGET_THUMB2) +=A0=A0=A0 max_insns_skipped =3D MIN (max_insns_skipped, MAX_INSN_PER_IT_BL= OCK); =A0} =A0 =A0/* True if -mflip-thumb should next add an attribute for the default =A0=A0=A0=A0=A0=A0=A0=20=20=20=20=20