From: Bernd Edlinger <bernd.edlinger@hotmail.de>
To: Richard Biener <rguenther@suse.de>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Richard Earnshaw <richard.earnshaw@arm.com>,
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>,
Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>,
Eric Botcazou <ebotcazou@adacore.com>
Subject: Re: [PATCHv2] Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544)
Date: Fri, 22 Mar 2019 17:47:00 -0000 [thread overview]
Message-ID: <AM6PR07MB403745E0BCCCF005A02B0CBDE4430@AM6PR07MB4037.eurprd07.prod.outlook.com> (raw)
In-Reply-To: <alpine.LSU.2.20.1903211208070.4934@zhemvz.fhfr.qr>
On 3/21/19 12:15 PM, Richard Biener wrote:
> On Sun, 10 Mar 2019, Bernd Edlinger wrote:
> Finally...
>
> Index: gcc/function.c
> ===================================================================
> --- gcc/function.c (revision 269264)
> +++ gcc/function.c (working copy)
> @@ -2210,6 +2210,12 @@ use_register_for_decl (const_tree decl)
> if (DECL_MODE (decl) == BLKmode)
> return false;
>
> + if (STRICT_ALIGNMENT && TREE_CODE (decl) == PARM_DECL
> + && DECL_INCOMING_RTL (decl) && MEM_P (DECL_INCOMING_RTL (decl))
> + && GET_MODE_ALIGNMENT (DECL_MODE (decl))
> + > MEM_ALIGN (DECL_INCOMING_RTL (decl)))
> + return false;
> +
> /* If -ffloat-store specified, don't put explicit float variables
> into registers. */
> /* ??? This should be checked after DECL_ARTIFICIAL, but tree-ssa
>
> I wonder if it is necessary to look at DECL_INCOMING_RTL here
> and why such RTL may not exist? That is, iff DECL_INCOMING_RTL
> doesn't exist then shouldn't we return false for safety reasons?
>
I think that happens a few times already before the INCOMING_RTL
is assigned. I thought that might be too pessimistic.
> Similarly the very same issue should exist on x86_64 which is
> !STRICT_ALIGNMENT, it's just the ABI seems to provide the appropriate
> alignment on the caller side. So the STRICT_ALIGNMENT check is
> a wrong one.
>
I may be plain wrong here, but I thought that !STRICT_ALIGNMENT targets
just use MEM_ALIGN to select the right instructions. MEM_ALIGN
is always 32-bit align on the DImode memory. The x86_64 vector instructions
would look at MEM_ALIGN and do the right thing, yes?
It seems to be the definition of STRICT_ALIGNMENT targets that all RTL
instructions need to have MEM_ALIGN >= GET_MODE_ALIGNMENT, so the target
does not even have to look at MEM_ALIGN except in the mov_misalign_optab,
right?
The other hunk, where I admit I did not fully understand the comment, tries
only to increase the MEM_ALIGN to 64-bit if the stack slot is
64-bit aligned although the target said it only needs 32-bit alignment.
So that it is no longer necessary to copy the incoming value.
> Which makes me think that a proper fix is not here, but in
> target(hook) code.
>
> Changing use_register_for_decl sounds odd anyways since if we return true
> we for the testcase still end up in memory, no?
>
It seems to make us use the incoming register _or_ stack slot if this function
returns true here.
If it returns false here, a new stack slot is allocated, but only if the
original stack slot was not aligned. This works together with the
other STRICT_ALIGNMENT check in assign_parm_adjust_stack_rtl.
Where also for !STRICT_ALIGNMENT target TYPE_ALIGN and MEM_ALIGN
are checked, but this seems to have only an effect if an address
is taken, in that case I see use_register_for_decl return false
due to TREE_ADDRESSABLE (decl), and whoops, we have an aligned copy
of the unaligned stack slot.
So I believe that there was already a fix for unaligned stack positions,
that relied on the addressability of the parameter, while the target
relied on the 8-byte alignment of the DImode access.
> The hunk obviously misses a comment since the effect that this
> will cause a copy to be emitted isn't obvious (and relying on
> this probably fragile).
>
Yes, also that the copy is done using movmisalign optab is important.
Thanks
Bernd.
next prev parent reply other threads:[~2019-03-22 17:44 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-10 12:51 Bernd Edlinger
2019-03-19 14:01 ` [PING] " Bernd Edlinger
2019-03-21 11:26 ` Richard Biener
2019-03-22 17:47 ` Bernd Edlinger [this message]
2019-03-25 9:28 ` Richard Biener
2019-07-30 22:13 ` [PATCHv3] " Bernd Edlinger
2019-07-31 13:17 ` Richard Earnshaw (lists)
2019-08-01 11:19 ` Bernd Edlinger
2019-08-02 9:10 ` Richard Earnshaw (lists)
2019-08-02 13:11 ` Richard Biener
2019-08-02 19:01 ` Bernd Edlinger
2019-08-08 14:20 ` [PATCHv4] " Bernd Edlinger
2019-08-14 10:54 ` [PING] " Bernd Edlinger
2019-08-14 12:27 ` Richard Biener
2019-08-14 22:26 ` Bernd Edlinger
2019-08-15 8:58 ` Richard Biener
2019-08-15 12:38 ` Bernd Edlinger
2019-08-15 13:03 ` Richard Biener
2019-08-15 14:33 ` Richard Biener
2019-08-15 15:28 ` Bernd Edlinger
2019-08-15 17:42 ` Richard Biener
2019-08-15 21:19 ` [PATCHv5] " Bernd Edlinger
2019-08-20 5:38 ` Jeff Law
2019-08-20 15:04 ` John David Anglin
[not found] ` <0d39b64f-67d9-7857-cf4e-36f09c0dc15e@bell.net>
2019-08-20 16:03 ` Fwd: " Bernd Edlinger
2019-09-04 12:53 ` Richard Earnshaw (lists)
2019-09-04 13:29 ` Bernd Edlinger
2019-09-04 14:14 ` Richard Earnshaw (lists)
2019-09-04 15:00 ` Bernd Edlinger
2019-09-04 15:48 ` Richard Earnshaw (lists)
2019-09-05 9:21 ` Richard Earnshaw (lists)
2019-09-05 9:35 ` Bernd Edlinger
2019-09-06 10:15 ` Bernd Edlinger
2019-09-06 10:18 ` Richard Earnshaw (lists)
2019-08-15 21:27 ` [PATCH] Sanitizing the middle-end interface to the back-end for strict alignment Bernd Edlinger
2019-08-17 10:11 ` Bernd Edlinger
2019-08-23 0:01 ` Jeff Law
2019-08-23 0:05 ` Jeff Law
2019-08-23 15:15 ` [PING] " Bernd Edlinger
2019-08-27 10:07 ` Kyrill Tkachov
2019-08-28 11:50 ` Bernd Edlinger
2019-08-28 12:01 ` Kyrill Tkachov
2019-08-28 13:54 ` Christophe Lyon
2019-08-28 21:48 ` Bernd Edlinger
2019-08-29 9:09 ` Kyrill Tkachov
2019-08-29 10:00 ` Christophe Lyon
2019-08-29 22:57 ` Bernd Edlinger
2019-08-30 10:07 ` Kyrill Tkachov
2019-08-30 15:22 ` Christophe Lyon
2019-08-14 11:56 ` [PATCHv3] Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544) Richard Biener
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