Hi all,

Similar to the mulv2di case, we can use SVE instruction to implement the V4SI and V2DI optabs
for signed and unsigned integer division.
This allows us to generate much cleaner code for the testcase than the current:
food:
        fmov    x1, d1
        fmov    x0, d0
        umov    x2, v0.d[1]
        sdiv    x0, x0, x1
        umov    x1, v1.d[1]
        sdiv    x1, x2, x1
        fmov    d0, x0
        ins     v0.d[1], x1
        ret
which now becomes:
food:
        ptrue   p0.b, all
        sdiv    z0.d, p0/m, z0.d, z1.d
        ret

Bootstrapped and tested on aarch64-none-linux-gnu.
Pushing to trunk.
Thanks,
Kyrill

gcc/ChangeLog:

	* config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
	* config/aarch64/iterators.md (VQDIV): New mode iterator.
	(vnx2di): New mode attribute.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/sve-neon-modes_3.c: New test.