From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13866 invoked by alias); 16 Jun 2014 16:12:09 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 13750 invoked by uid 89); 16 Jun 2014 16:12:08 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.7 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 16 Jun 2014 16:12:06 +0000 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 6137D60DF0431; Mon, 16 Jun 2014 17:12:00 +0100 (IST) Received: from KLMAIL02.kl.imgtec.org (192.168.5.97) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.181.6; Mon, 16 Jun 2014 17:12:02 +0100 Received: from KLMAIL01.kl.imgtec.org ([192.168.5.35]) by klmail02.kl.imgtec.org ([192.168.5.97]) with mapi id 14.03.0181.006; Mon, 16 Jun 2014 17:12:02 +0100 From: Robert Suchanek To: Richard Sandiford , Vladimir Makarov CC: Matthew Fortune , "gcc-patches@gcc.gnu.org" , Kyrill Tkachov Subject: RE: RFA: Make LRA temporarily eliminate addresses before testing constraints Date: Mon, 16 Jun 2014 16:12:00 -0000 Message-ID: References: <87d2h51dm6.fsf@talisman.default> <87d2gqfb7t.fsf@talisman.default> <87ob02jodp.fsf@talisman.default> <87fvl6hnw2.fsf@talisman.default> <5357D588.6000202@redhat.com> <87tx967jnq.fsf@talisman.default> <5368EC5F.3010006@arm.com> <87mweuww37.fsf@talisman.default> <6D39441BF12EF246A7ABCE6654B0235352881A@LEMAIL01.le.imgtec.org> <87vbtd1njm.fsf@talisman.default> <871tvqnai3.fsf@talisman.default> <8761kjaysm.fsf_-_@talisman.default> <538E3500.9040500@redhat.com> <87a99s4lih.fsf@talisman.default> In-Reply-To: <87a99s4lih.fsf@talisman.default> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-SW-Source: 2014-06/txt/msg01295.txt.bz2 Pinging for approval. This part of the patch will be needed for MIPS16. The second part to enable LRA in MIPS has been already approved. > Hi Richard,=20 >=20 > >> Robert: you also had an LRA change, but is it still needed after this = one? > >> If so, could you repost it and explain the case it handles?=20 > > For just turning the LRA for the MIPS backend is not needed but we have i= ssues > with the code size for MIPS16. LRA inserted a lot of reloads and the code= size > increased on average by about 10% IIRC. To fix this, a number of patterns= =20 > have to accept the stack pointer and a new class, M16_SP_REGS with=20 > M16_REGS + $sp was added. >=20 > However, this triggered a reloading problem as the stack pointer was reje= cted > by the back end and LRA tried to insert base+disp with the displacement n= ot > always present. It only affects $sp not directly accessible as in MIPS16 = case. > > Regards, > Robert >=20=20=20=20=20=20=20=20=20 > gcc/=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20 > * lra-constraints.c (base_to_reg): New function.=20=20=20=20=20=20=20 > (process_address): Use new function.=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20 >=20 > diff --git gcc/lra-constraints.c gcc/lra-constraints.c > index 08716fe..d5ed37f 100644 > --- gcc/lra-constraints.c > +++ gcc/lra-constraints.c > @@ -2686,6 +2686,39 @@ process_alt_operands (int only_alternative) > return ok_p; > } >=20=20 > +/* Make reload base reg from address AD. */ > +static rtx > +base_to_reg (struct address_info *ad) > +{ > + enum reg_class cl; > + int code =3D -1; > + rtx new_inner =3D NULL_RTX; > + rtx new_reg =3D NULL_RTX; > + rtx insn; > + rtx last_insn =3D get_last_insn(); > + > + lra_assert (ad->base =3D=3D ad->base_term && ad->disp =3D=3D ad->disp_= term); > + cl =3D base_reg_class (ad->mode, ad->as, ad->base_outer_code, > + get_index_code (ad)); > + new_reg =3D lra_create_new_reg (GET_MODE (*ad->base_term), NULL_RTX, > + cl, "base"); > + new_inner =3D simplify_gen_binary (PLUS, GET_MODE (new_reg), new_reg, > + ad->disp_term =3D=3D NULL > + ? gen_int_mode (0, ad->mode) > + : *ad->disp_term); > + if (!valid_address_p (ad->mode, new_inner, ad->as)) > + return NULL_RTX; > + insn =3D emit_insn (gen_rtx_SET (ad->mode, new_reg, *ad->base_term)); > + code =3D recog_memoized (insn); > + if (code < 0) > + { > + delete_insns_since (last_insn); > + return NULL_RTX; > + } > + > + return new_inner; > +} > + > /* Make reload base reg + disp from address AD. Return the new pseudo. = */ > static rtx > base_plus_disp_to_reg (struct address_info *ad) > @@ -2908,6 +2941,8 @@ process_address_1 (int nop, rtx *before, rtx *after) >=20=20 > 3) the address is a frame address with an invalid offset. >=20=20 > + 4) the address is a frame address with an invalid base. > + > All these cases involve a non-autoinc address, so there is no > point revalidating other types. */ > if (ad.autoinc_p || valid_address_p (&ad)) > @@ -2989,14 +3024,19 @@ process_address_1 (int nop, rtx *before, rtx *aft= er) > int regno; > enum reg_class cl; > rtx set, insns, last_insn; > + /* Try to reload base into register only if the base is invalid > + for the address but with valid offset, case (4) above. */ > + start_sequence (); > + new_reg =3D base_to_reg (&ad); > + > /* base + disp =3D> new base, cases (1) and (3) above. */ > /* Another option would be to reload the displacement into an > index register. However, postreload has code to optimize > address reloads that have the same base and different > displacements, so reloading into an index register would > not necessarily be a win. */ > - start_sequence (); > - new_reg =3D base_plus_disp_to_reg (&ad); > + if (new_reg =3D=3D NULL_RTX) > + new_reg =3D base_plus_disp_to_reg (&ad); > insns =3D get_insns (); > last_insn =3D get_last_insn (); > /* If we generated at least two insns, try last insn source as