* [PATCH, i386]: Remaining FP moves cleanups
@ 2011-06-05 20:46 Uros Bizjak
2011-06-07 13:43 ` H.J. Lu
0 siblings, 1 reply; 6+ messages in thread
From: Uros Bizjak @ 2011-06-05 20:46 UTC (permalink / raw)
To: gcc-patches
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Hello!
2011-06-05 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (*movdf_internal_rex64) <case 8,9,10>:
Remove MODE_TI handling. Remove SSE1 handling in attribute "mode"
calculation.
(*movdf_internal_rex64) <case 6,7,8>: Remove MODE_TI handling.
Simplify MODE_V1DF and MODE_V2SF handling.
(*movsf_internal): Remove x constraint from operand 1 alternative 7.
Simplify MODE_SF handling.
Patch was bootstrapped and regression tested on x86_64-pc-linux-gnuj
{,-m32} AVX target. Committed to mainline SVN.
Uros.
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Index: i386.md
===================================================================
--- i386.md (revision 174655)
+++ i386.md (working copy)
@@ -2956,9 +2956,6 @@
case 10:
switch (get_attr_mode (insn))
{
- case MODE_TI:
- if (!TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
- return "%vmovdqa\t{%1, %0|%0, %1}";
case MODE_V2DF:
if (!TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
return "%vmovapd\t{%1, %0|%0, %1}";
@@ -2970,8 +2967,7 @@
case MODE_DF:
if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
return "vmovsd\t{%1, %0, %0|%0, %0, %1}";
- else
- return "%vmovsd\t{%1, %0|%0, %1}";
+ return "%vmovsd\t{%1, %0|%0, %1}";
case MODE_V1DF:
return "%vmovlpd\t{%1, %d0|%d0, %1}";
case MODE_V2SF:
@@ -3014,13 +3010,6 @@
(eq_attr "alternative" "3,4,5,6,11,12")
(const_string "DI")
- /* For SSE1, we have many fewer alternatives. */
- (eq (symbol_ref "TARGET_SSE2") (const_int 0))
- (cond [(eq_attr "alternative" "7,8")
- (const_string "V4SF")
- ]
- (const_string "V2SF"))
-
/* xorps is one byte shorter. */
(eq_attr "alternative" "7")
(cond [(ne (symbol_ref "optimize_function_for_size_p (cfun)")
@@ -3099,9 +3088,6 @@
case 8:
switch (get_attr_mode (insn))
{
- case MODE_TI:
- if (!TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
- return "%vmovdqa\t{%1, %0|%0, %1}";
case MODE_V2DF:
if (!TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
return "%vmovapd\t{%1, %0|%0, %1}";
@@ -3113,18 +3099,11 @@
case MODE_DF:
if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
return "vmovsd\t{%1, %0, %0|%0, %0, %1}";
- else
- return "%vmovsd\t{%1, %0|%0, %1}";
+ return "%vmovsd\t{%1, %0|%0, %1}";
case MODE_V1DF:
- if (TARGET_AVX && REG_P (operands[0]))
- return "vmovlpd\t{%1, %0, %0|%0, %0, %1}";
- else
- return "%vmovlpd\t{%1, %0|%0, %1}";
+ return "%vmovlpd\t{%1, %d0|%d0, %1}";
case MODE_V2SF:
- if (TARGET_AVX && REG_P (operands[0]))
- return "vmovlps\t{%1, %0, %0|%0, %0, %1}";
- else
- return "%vmovlps\t{%1, %0|%0, %1}";
+ return "%vmovlps\t{%1, %d0|%d0, %1}";
default:
gcc_unreachable ();
}
@@ -3150,9 +3129,9 @@
/* For SSE1, we have many fewer alternatives. */
(eq (symbol_ref "TARGET_SSE2") (const_int 0))
- (cond [(eq_attr "alternative" "5,6")
- (const_string "V4SF")
- ]
+ (if_then_else
+ (eq_attr "alternative" "5,6")
+ (const_string "V4SF")
(const_string "V2SF"))
/* xorps is one byte shorter. */
@@ -3195,9 +3174,9 @@
(define_insn "*movsf_internal"
[(set (match_operand:SF 0 "nonimmediate_operand"
- "=f,m,f,?r ,?m,x,x,x ,m,!*y,!m,!*y,?Yi,?r,!*Ym,!r")
+ "=f,m,f,?r ,?m,x,x,x,m,!*y,!m,!*y,?Yi,?r,!*Ym,!r")
(match_operand:SF 1 "general_operand"
- "fm,f,G,rmF,Fr,C,x,xm,x,m ,*y,*y ,r ,Yi,r ,*Ym"))]
+ "fm,f,G,rmF,Fr,C,x,m,x,m ,*y,*y ,r ,Yi,r ,*Ym"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
&& (!can_create_pseudo_p ()
|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
@@ -3228,23 +3207,24 @@
case 6:
if (get_attr_mode (insn) == MODE_V4SF)
return "%vmovaps\t{%1, %0|%0, %1}";
- else
- return "%vmovss\t{%1, %d0|%d0, %1}";
+
case 7:
- if (TARGET_AVX && REG_P (operands[1]))
- return "vmovss\t{%1, %0, %0|%0, %0, %1}";
- else
- return "%vmovss\t{%1, %0|%0, %1}";
case 8:
+ if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
+ return "vmovss\t{%1, %0, %0|%0, %0, %1}";
return "%vmovss\t{%1, %0|%0, %1}";
- case 9: case 10: case 14: case 15:
+ case 9:
+ case 10:
+ case 14:
+ case 15:
return "movd\t{%1, %0|%0, %1}";
case 11:
return "movq\t{%1, %0|%0, %1}";
- case 12: case 13:
+ case 12:
+ case 13:
return "%vmovd\t{%1, %0|%0, %1}";
default:
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH, i386]: Remaining FP moves cleanups
2011-06-05 20:46 [PATCH, i386]: Remaining FP moves cleanups Uros Bizjak
@ 2011-06-07 13:43 ` H.J. Lu
2011-06-07 14:03 ` Uros Bizjak
0 siblings, 1 reply; 6+ messages in thread
From: H.J. Lu @ 2011-06-07 13:43 UTC (permalink / raw)
To: Uros Bizjak; +Cc: gcc-patches
On Sun, Jun 5, 2011 at 1:46 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> Hello!
>
> 2011-06-05 Uros Bizjak <ubizjak@gmail.com>
>
> * config/i386/i386.md (*movdf_internal_rex64) <case 8,9,10>:
> Remove MODE_TI handling. Remove SSE1 handling in attribute "mode"
> calculation.
> (*movdf_internal_rex64) <case 6,7,8>: Remove MODE_TI handling.
> Simplify MODE_V1DF and MODE_V2SF handling.
> (*movsf_internal): Remove x constraint from operand 1 alternative 7.
> Simplify MODE_SF handling.
>
> Patch was bootstrapped and regression tested on x86_64-pc-linux-gnuj
> {,-m32} AVX target. Committed to mainline SVN.
>
Hi Uros,
The new *movsf_internal patter has
[(set (match_operand:SF 0 "nonimmediate_operand"
"=f,m,f,?r ,?m,x,x,x,m,!*y,!m,!*y,?Yi,?r,!*Ym,!r")
(match_operand:SF 1 "general_operand"
"fm,f,G,rmF,Fr,C,x,m,x,m ,*y,*y ,r ,Yi,r ,*Ym"))]
...
case 7:
case 8:
if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
return "vmovss\t{%1, %0, %0|%0, %0, %1}";
return "%vmovss\t{%1, %0|%0, %1}";
Since 7 is store and 8 is load,
if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
will always be false. Should we remove it?
Thanks.
--
H.J.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH, i386]: Remaining FP moves cleanups
2011-06-07 13:43 ` H.J. Lu
@ 2011-06-07 14:03 ` Uros Bizjak
2011-06-07 14:08 ` H.J. Lu
0 siblings, 1 reply; 6+ messages in thread
From: Uros Bizjak @ 2011-06-07 14:03 UTC (permalink / raw)
To: H.J. Lu; +Cc: gcc-patches
On Tue, Jun 7, 2011 at 3:42 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>> 2011-06-05 Uros Bizjak <ubizjak@gmail.com>
>>
>> * config/i386/i386.md (*movdf_internal_rex64) <case 8,9,10>:
>> Remove MODE_TI handling. Remove SSE1 handling in attribute "mode"
>> calculation.
>> (*movdf_internal_rex64) <case 6,7,8>: Remove MODE_TI handling.
>> Simplify MODE_V1DF and MODE_V2SF handling.
>> (*movsf_internal): Remove x constraint from operand 1 alternative 7.
>> Simplify MODE_SF handling.
>>
>> Patch was bootstrapped and regression tested on x86_64-pc-linux-gnuj
>> {,-m32} AVX target. Committed to mainline SVN.
>>
>
> Hi Uros,
>
> The new *movsf_internal patter has
>
> [(set (match_operand:SF 0 "nonimmediate_operand"
> "=f,m,f,?r ,?m,x,x,x,m,!*y,!m,!*y,?Yi,?r,!*Ym,!r")
> (match_operand:SF 1 "general_operand"
> "fm,f,G,rmF,Fr,C,x,m,x,m ,*y,*y ,r ,Yi,r ,*Ym"))]
> ...
> case 7:
> case 8:
> if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
> return "vmovss\t{%1, %0, %0|%0, %0, %1}";
> return "%vmovss\t{%1, %0|%0, %1}";
>
> Since 7 is store and 8 is load,
>
> if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
>
> will always be false. Should we remove it?
No, because it also handles fallthru from case 6.
OTOH, you are right, this statement can be moved to case 6, without
the check for registers.
Thanks,
Uros.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH, i386]: Remaining FP moves cleanups
2011-06-07 14:03 ` Uros Bizjak
@ 2011-06-07 14:08 ` H.J. Lu
2011-06-07 14:12 ` Uros Bizjak
0 siblings, 1 reply; 6+ messages in thread
From: H.J. Lu @ 2011-06-07 14:08 UTC (permalink / raw)
To: Uros Bizjak; +Cc: gcc-patches
On Tue, Jun 7, 2011 at 7:02 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Tue, Jun 7, 2011 at 3:42 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>
>>> 2011-06-05 Uros Bizjak <ubizjak@gmail.com>
>>>
>>> * config/i386/i386.md (*movdf_internal_rex64) <case 8,9,10>:
>>> Remove MODE_TI handling. Remove SSE1 handling in attribute "mode"
>>> calculation.
>>> (*movdf_internal_rex64) <case 6,7,8>: Remove MODE_TI handling.
>>> Simplify MODE_V1DF and MODE_V2SF handling.
>>> (*movsf_internal): Remove x constraint from operand 1 alternative 7.
>>> Simplify MODE_SF handling.
>>>
>>> Patch was bootstrapped and regression tested on x86_64-pc-linux-gnuj
>>> {,-m32} AVX target. Committed to mainline SVN.
>>>
>>
>> Hi Uros,
>>
>> The new *movsf_internal patter has
>>
>> [(set (match_operand:SF 0 "nonimmediate_operand"
>> "=f,m,f,?r ,?m,x,x,x,m,!*y,!m,!*y,?Yi,?r,!*Ym,!r")
>> (match_operand:SF 1 "general_operand"
>> "fm,f,G,rmF,Fr,C,x,m,x,m ,*y,*y ,r ,Yi,r ,*Ym"))]
>> ...
>> case 7:
>> case 8:
>> if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
>> return "vmovss\t{%1, %0, %0|%0, %0, %1}";
>> return "%vmovss\t{%1, %0|%0, %1}";
>>
>> Since 7 is store and 8 is load,
>>
>> if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
>>
>> will always be false. Should we remove it?
>
> No, because it also handles fallthru from case 6.
>
> OTOH, you are right, this statement can be moved to case 6, without
> the check for registers.
>
Like this? OK for trunk with a ChangeLog entry?
Thanks.
--
H.J.
----
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 58de87b..a61bffb 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3207,11 +3207,11 @@
case 6:
if (get_attr_mode (insn) == MODE_V4SF)
return "%vmovaps\t{%1, %0|%0, %1}";
+ else if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
+ return "vmovss\t{%1, %0, %0|%0, %0, %1}";
case 7:
case 8:
- if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
- return "vmovss\t{%1, %0, %0|%0, %0, %1}";
return "%vmovss\t{%1, %0|%0, %1}";
case 9:
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH, i386]: Remaining FP moves cleanups
2011-06-07 14:08 ` H.J. Lu
@ 2011-06-07 14:12 ` Uros Bizjak
2011-06-07 14:55 ` H.J. Lu
0 siblings, 1 reply; 6+ messages in thread
From: Uros Bizjak @ 2011-06-07 14:12 UTC (permalink / raw)
To: H.J. Lu; +Cc: gcc-patches
On Tue, Jun 7, 2011 at 4:07 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>> OTOH, you are right, this statement can be moved to case 6, without
>> the check for registers.
>>
>
> Like this? OK for trunk with a ChangeLog entry?
>
> Thanks.
>
> --
> H.J.
> ----
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
> index 58de87b..a61bffb 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -3207,11 +3207,11 @@
> case 6:
> if (get_attr_mode (insn) == MODE_V4SF)
> return "%vmovaps\t{%1, %0|%0, %1}";
> + else if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
if (TARGET_AVX)
> + return "vmovss\t{%1, %0, %0|%0, %0, %1}";
>
> case 7:
> case 8:
> - if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
> - return "vmovss\t{%1, %0, %0|%0, %0, %1}";
> return "%vmovss\t{%1, %0|%0, %1}";
>
> case 9:
>
OK with this change and suitable ChangeLog entry.
Thanks,
Uros.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH, i386]: Remaining FP moves cleanups
2011-06-07 14:12 ` Uros Bizjak
@ 2011-06-07 14:55 ` H.J. Lu
0 siblings, 0 replies; 6+ messages in thread
From: H.J. Lu @ 2011-06-07 14:55 UTC (permalink / raw)
To: Uros Bizjak; +Cc: gcc-patches
On Tue, Jun 7, 2011 at 7:12 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Tue, Jun 7, 2011 at 4:07 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>
>>> OTOH, you are right, this statement can be moved to case 6, without
>>> the check for registers.
>>>
>>
>> Like this? OK for trunk with a ChangeLog entry?
>>
>> Thanks.
>>
>> --
>> H.J.
>> ----
>> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
>> index 58de87b..a61bffb 100644
>> --- a/gcc/config/i386/i386.md
>> +++ b/gcc/config/i386/i386.md
>> @@ -3207,11 +3207,11 @@
>> case 6:
>> if (get_attr_mode (insn) == MODE_V4SF)
>> return "%vmovaps\t{%1, %0|%0, %1}";
>> + else if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
>
> if (TARGET_AVX)
>
>> + return "vmovss\t{%1, %0, %0|%0, %0, %1}";
>>
>> case 7:
>> case 8:
>> - if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
>> - return "vmovss\t{%1, %0, %0|%0, %0, %1}";
>> return "%vmovss\t{%1, %0|%0, %1}";
>>
>> case 9:
>>
>
> OK with this change and suitable ChangeLog entry.
>
This is what I checked in.
Thanks.
--
H.J.
----
2011-06-07 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.md (*movsf_internal): Optimize AVX check.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 58de87b..3e18e7a 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3207,11 +3207,11 @@
case 6:
if (get_attr_mode (insn) == MODE_V4SF)
return "%vmovaps\t{%1, %0|%0, %1}";
+ if (TARGET_AVX)
+ return "vmovss\t{%1, %0, %0|%0, %0, %1}";
case 7:
case 8:
- if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
- return "vmovss\t{%1, %0, %0|%0, %0, %1}";
return "%vmovss\t{%1, %0|%0, %1}";
case 9:
^ permalink raw reply [flat|nested] 6+ messages in thread
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2011-06-05 20:46 [PATCH, i386]: Remaining FP moves cleanups Uros Bizjak
2011-06-07 13:43 ` H.J. Lu
2011-06-07 14:03 ` Uros Bizjak
2011-06-07 14:08 ` H.J. Lu
2011-06-07 14:12 ` Uros Bizjak
2011-06-07 14:55 ` H.J. Lu
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