From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 16036 invoked by alias); 20 Jun 2011 14:50:55 -0000 Received: (qmail 15926 invoked by uid 22791); 20 Jun 2011 14:50:54 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,RFC_ABUSE_POST X-Spam-Check-By: sourceware.org Received: from mail-qw0-f47.google.com (HELO mail-qw0-f47.google.com) (209.85.216.47) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 20 Jun 2011 14:50:31 +0000 Received: by qwh5 with SMTP id 5so1272656qwh.20 for ; Mon, 20 Jun 2011 07:50:31 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.212.8 with SMTP id gq8mr2785359qcb.73.1308581430961; Mon, 20 Jun 2011 07:50:30 -0700 (PDT) Received: by 10.229.47.78 with HTTP; Mon, 20 Jun 2011 07:50:30 -0700 (PDT) In-Reply-To: <4DFF5BE9.6080404@redhat.com> References: <20110620135115.GA11874@lucon.org> <4DFF50E0.8030404@codesourcery.com> <4DFF5A40.8000903@zytor.com> <4DFF5BE9.6080404@redhat.com> Date: Mon, 20 Jun 2011 15:11:00 -0000 Message-ID: Subject: Re: [x32] PATCH: Remove ix86_promote_function_mode From: "H.J. Lu" To: Jeff Law Cc: "H. Peter Anvin" , Bernd Schmidt , gcc-patches@gcc.gnu.org, Eric Botcazou Content-Type: text/plain; charset=ISO-8859-1 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-06/txt/msg01489.txt.bz2 On Mon, Jun 20, 2011 at 7:40 AM, Jeff Law wrote: > >>> Peter, do you think it is safe to assume upper 32bits are zero in >>> user space for x32? Kernel isn't a problem since pointer is 64bit >>> in kernel and we don't pass pointers on stack to kernel. >> >> As I have already stated, if we *cannot* require pointers to be >> zero-extended on entry to the kernel, we're going to have to have >> special entry points for all the x32 system calls except the ones that >> don't take pointers.asdfasfd > BTW (and feel free to respond off-list), what's the rationale behind > zero-extending values in x32 from 32 bits to 64 bits rather than the > more traditional sign-extending? > Since hardware zero-extends 32-bit result to 64-bit in the destination general-purpose register, we can load addresses into 32bit (ptr_mode) register and use the full 64bit (Pmode) register without any additional instructions. As far as the processor is concerned, x32 process is the same as x86-64 process. The only difference is x32 won't go over 4GB. -- H.J.