[committed] Improve handling of reloads for floating point loads and stores on PA

[committed] Improve handling of reloads for floating point loads and stores on PA

[John David Anglin]

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The attached patch fixes an ICE building the code-saturne package and generally improves the
code generated for floating point loads and stores.  With the previous implementation, it was not
possible to load a LO_SUM DLT address to a floating point register (e.g., for an integer multiplication)
when generating PIC code.  While this is unusual, it appears perfectly valid.

We now request a secondary reload with a general scratch register and pa_emit_move_sequence
handles the rest.

Tested on hppa2.0w-hp-hpux11.11, hppa64-hp-hpux11.11 and hppa-unknown-linux-gnu.  Committed
to trunk and 4.9 branch.

Dave
--
John David Anglin	dave.anglin@bell.net



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2015-02-15  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.c (pa_secondary_reload): Request a secondary reload
	for all floading point loads and stores except those using a register
	index address.
	* config/pa/pa.md: Add new patterns to load a lo_sum DLT operand
	to a register.

Index: config/pa/pa.c
===================================================================
--- config/pa/pa.c	(revision 220681)
+++ config/pa/pa.c	(working copy)
@@ -6031,18 +6031,15 @@
 	{
 	  x = XEXP (x, 0);
 
-	  /* We don't need an intermediate for indexed and LO_SUM DLT
-	     memory addresses.  When INT14_OK_STRICT is true, it might
-	     appear that we could directly allow register indirect
-	     memory addresses.  However, this doesn't work because we
-	     don't support SUBREGs in floating-point register copies
-	     and reload doesn't tell us when it's going to use a SUBREG.  */
-	  if (IS_INDEX_ADDR_P (x)
-	      || IS_LO_SUM_DLT_ADDR_P (x))
+	  /* We don't need a secondary reload for indexed memory addresses.
+
+	     When INT14_OK_STRICT is true, it might appear that we could
+	     directly allow register indirect memory addresses.  However,
+	     this doesn't work because we don't support SUBREGs in
+	     floating-point register copies and reload doesn't tell us
+	     when it's going to use a SUBREG.  */
+	  if (IS_INDEX_ADDR_P (x))
 	    return NO_REGS;
-
-	  /* Request intermediate general register.  */
-	  return GENERAL_REGS;
 	}
 
       /* Request a secondary reload with a general scratch register
Index: config/pa/pa.md
===================================================================
--- config/pa/pa.md	(revision 220681)
+++ config/pa/pa.md	(working copy)
@@ -2673,6 +2673,29 @@
   [(set_attr "type" "binary")
    (set_attr "length" "4")])
 
+(define_insn ""
+ [(set (match_operand:SI 0 "register_operand" "=r")
+       (lo_sum:SI (match_operand:SI 1 "register_operand" "r")
+		  (unspec:SI [(match_operand 2 "" "")] UNSPEC_DLTIND14R)))]
+  "symbolic_operand (operands[2], Pmode)
+   && ! function_label_operand (operands[2], Pmode)
+   && flag_pic"
+  "ldo RT'%G2(%1),%0"
+  [(set_attr "type" "binary")
+   (set_attr "length" "4")])
+
+(define_insn ""
+ [(set (match_operand:DI 0 "register_operand" "=r")
+       (lo_sum:DI (match_operand:DI 1 "register_operand" "r")
+		  (unspec:DI [(match_operand 2 "" "")] UNSPEC_DLTIND14R)))]
+  "symbolic_operand (operands[2], Pmode)
+   && ! function_label_operand (operands[2], Pmode)
+   && TARGET_64BIT
+   && flag_pic"
+  "ldo RT'%G2(%1),%0"
+  [(set_attr "type" "binary")
+   (set_attr "length" "4")])
+
 ;; Always use addil rather than ldil;add sequences.  This allows the
 ;; HP linker to eliminate the dp relocation if the symbolic operand
 ;; lives in the TEXT space.