[PATCH] [ARC] Pass along -mcode-density flag to the assembler

[PATCH] [ARC] Pass along -mcode-density flag to the assembler

[Shahab Vahedi]

From: Shahab Vahedi <shahab@synopsys.com>

This change makes sure that if the driver is invoked with
"-mcode-density" flag, then the assembler will receive it
too.

gcc/
2019-09-03  Sahahb Vahedi  <shahab@synopsys.com>

        * config/arc/arc.h (ASM_SPEC): pass -mcode-density
        * gcc.target/arc/code-density-flag.c: New test.

Signed-off-by: Shahab Vahedi <shahab@synopsys.com>
---
 gcc/config/arc/arc.h                          |  5 +--
 .../gcc.target/arc/code-density-flag.c        | 34 +++++++++++++++++++
 2 files changed, 37 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/arc/code-density-flag.c

diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 8dca0d2c4b2..05fba539295 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -96,8 +96,9 @@ extern const char *arc_cpu_to_as (int argc, const char **argv);
 #endif
 
 #undef ASM_SPEC
-#define ASM_SPEC  "%{mbig-endian|EB:-EB} %{EL} "			\
-  "%:cpu_to_as(%{mcpu=*:%*}) %{mspfp*} %{mdpfp*} %{mfpu=fpuda*:-mfpuda}"
+#define ASM_SPEC  "%{mbig-endian|EB:-EB} %{EL} "	\
+  "%:cpu_to_as(%{mcpu=*:%*}) %{mspfp*} %{mdpfp*} "	\
+  "%{mfpu=fpuda*:-mfpuda} %{mcode-density}"
 
 #define OPTION_DEFAULT_SPECS						\
   {"cpu", "%{!mcpu=*:%{!mARC*:%{!marc*:%{!mA7:%{!mA6:-mcpu=%(VALUE)}}}}}" }
diff --git a/gcc/testsuite/gcc.target/arc/code-density-flag.c b/gcc/testsuite/gcc.target/arc/code-density-flag.c
new file mode 100644
index 00000000000..1ecf1a2ca29
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/code-density-flag.c
@@ -0,0 +1,34 @@
+/* Produce code-dense instructions  and  the assembler must *
+ * be okay with it. An example would be:                    *
+ *                                                          *
+ * sub_s  r3, r1, r3                                        *
+ *                                                          *
+ * While generally for  _short instructions_ ,  it  is  not *
+ * allowed to have different registers  as  the  first  and *
+ * second operands, the code-dense mode allows it.          *
+ * This test is about the fact that if  "-mcode-density" is *
+ * passed to gcc driver as the flag,  "as"  must receive it *
+ * as well, else it is going to choke on such encodings.    */
+
+/* { dg-do assemble }                                       */
+/* { dg-skip-if "" { ! { clmcpu } } }                       */
+/* { dg-options "-mcpu=em_mini -mcode-density" }            */
+
+typedef long long uint64_t;
+
+uint64_t f1(void)
+{
+  return 1;
+}
+
+void f2(void)
+{
+  uint64_t start_us = 0;
+  while ((f1() - start_us) < 2);
+}
+
+/* This is a tricky check, because  it  hardcodes  register *
+ * numbers. Nevertheless, it is easier than coming up  with *
+ * a regular expression that the first two operands  should *
+ * not be the same.                                         */
+/* { dg-final { scan-assembler "sub_s\\s+r3,r1,r3" } }      */
-- 
2.23.0

RE: [PATCH] [ARC] Pass along -mcode-density flag to the assembler

[Claudiu Zissulescu]

It looks good. I'll merge it asap.

Thank you for your contribution,
Claudiu

> -----Original Message-----
> From: Shahab Vahedi [mailto:shahab.vahedi@gmail.com]
> Sent: Tuesday, September 03, 2019 7:14 PM
> To: Claudiu Zissulescu <claziss@synopsys.com>
> Cc: Shahab Vahedi <shahab@synopsys.com>; gcc-patches@gcc.gnu.org;
> Francois Bedard <fbedard@synopsys.com>
> Subject: [PATCH] [ARC] Pass along -mcode-density flag to the assembler
> 
> From: Shahab Vahedi <shahab@synopsys.com>
> 
> This change makes sure that if the driver is invoked with
> "-mcode-density" flag, then the assembler will receive it
> too.
> 
> gcc/
> 2019-09-03  Sahahb Vahedi  <shahab@synopsys.com>
> 
>         * config/arc/arc.h (ASM_SPEC): pass -mcode-density
>         * gcc.target/arc/code-density-flag.c: New test.
> 
> Signed-off-by: Shahab Vahedi <shahab@synopsys.com>
> ---
>  gcc/config/arc/arc.h                          |  5 +--
>  .../gcc.target/arc/code-density-flag.c        | 34 +++++++++++++++++++
>  2 files changed, 37 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/arc/code-density-flag.c
> 
> diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
> index 8dca0d2c4b2..05fba539295 100644
> --- a/gcc/config/arc/arc.h
> +++ b/gcc/config/arc/arc.h
> @@ -96,8 +96,9 @@ extern const char *arc_cpu_to_as (int argc, const char
> **argv);
>  #endif
> 
>  #undef ASM_SPEC
> -#define ASM_SPEC  "%{mbig-endian|EB:-EB} %{EL} "			\
> -  "%:cpu_to_as(%{mcpu=*:%*}) %{mspfp*} %{mdpfp*} %{mfpu=fpuda*:-
> mfpuda}"
> +#define ASM_SPEC  "%{mbig-endian|EB:-EB} %{EL} "	\
> +  "%:cpu_to_as(%{mcpu=*:%*}) %{mspfp*} %{mdpfp*} "	\
> +  "%{mfpu=fpuda*:-mfpuda} %{mcode-density}"
> 
>  #define OPTION_DEFAULT_SPECS
> 	\
>    {"cpu", "%{!mcpu=*:%{!mARC*:%{!marc*:%{!mA7:%{!mA6:-
> mcpu=%(VALUE)}}}}}" }
> diff --git a/gcc/testsuite/gcc.target/arc/code-density-flag.c
> b/gcc/testsuite/gcc.target/arc/code-density-flag.c
> new file mode 100644
> index 00000000000..1ecf1a2ca29
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arc/code-density-flag.c
> @@ -0,0 +1,34 @@
> +/* Produce code-dense instructions  and  the assembler must *
> + * be okay with it. An example would be:                    *
> + *                                                          *
> + * sub_s  r3, r1, r3                                        *
> + *                                                          *
> + * While generally for  _short instructions_ ,  it  is  not *
> + * allowed to have different registers  as  the  first  and *
> + * second operands, the code-dense mode allows it.          *
> + * This test is about the fact that if  "-mcode-density" is *
> + * passed to gcc driver as the flag,  "as"  must receive it *
> + * as well, else it is going to choke on such encodings.    */
> +
> +/* { dg-do assemble }                                       */
> +/* { dg-skip-if "" { ! { clmcpu } } }                       */
> +/* { dg-options "-mcpu=em_mini -mcode-density" }            */
> +
> +typedef long long uint64_t;
> +
> +uint64_t f1(void)
> +{
> +  return 1;
> +}
> +
> +void f2(void)
> +{
> +  uint64_t start_us = 0;
> +  while ((f1() - start_us) < 2);
> +}
> +
> +/* This is a tricky check, because  it  hardcodes  register *
> + * numbers. Nevertheless, it is easier than coming up  with *
> + * a regular expression that the first two operands  should *
> + * not be the same.                                         */
> +/* { dg-final { scan-assembler "sub_s\\s+r3,r1,r3" } }      */
> --
> 2.23.0