Hi, Richard. My criteria were very much (a). In some cases though, a particular instruction could have variations that others in its natural group didn’t, when if seemed sensible to create a specific description for this instruction, even if its base form shares resources with other instructions in its group. Do you have specific instances in mind? Thank you, -- Evandro Menezes > Em 15 de mai. de 2023, à(s) 04:00, Richard Sandiford escreveu: > > Evandro Menezes via Gcc-patches writes: >> This patch adds the attribute `type` to most SVE1 instructions, as in the other >> instructions. > > Thanks for doing this. > > Could you say what criteria you used for picking the granularity? Other > maintainers might disagree, but personally I'd prefer to distinguish two > instructions only if: > > (a) a scheduling description really needs to distinguish them or > (b) grouping them together would be very artificial (because they're > logically unrelated) > > It's always possible to split types later if new scheduling descriptions > require it. Because of that, I don't think we should try to predict ahead > of time what future scheduling descriptions will need. > > Of course, this depends on having results that show that scheduling > makes a significant difference on an SVE core. I think one of the > problems here is that, when a different scheduling model changes the > performance of a particular test, it's difficult to tell whether > the gain/loss is caused by the model being more/less accurate than > the previous one, or if it's due to important "secondary" effects > on register live ranges. Instinctively, I'd have expected these > secondary effects to dominate on OoO cores. > > Richard -- Evandro Menezes ◊ evandro@yahoo.com ◊ Austin, TX Άγιος ο Θεός ⁂ ܩܕܝܫܐ ܐܢ̱ܬ ܠܐ ܡܝܘܬܐ ⁂ Sanctus Deus