From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 35725 invoked by alias); 26 Oct 2019 19:33:42 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 35713 invoked by uid 89); 26 Oct 2019 19:33:41 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-8.9 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.1 spammy=H*f:sk:aecb2ae, H*r:sk:mail-wm, coupled, H*i:sk:aecb2ae X-HELO: mail-ed1-f67.google.com Received: from mail-ed1-f67.google.com (HELO mail-ed1-f67.google.com) (209.85.208.67) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 26 Oct 2019 19:33:40 +0000 Received: by mail-ed1-f67.google.com with SMTP id q24so4553749edr.10 for ; Sat, 26 Oct 2019 12:33:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=YXewVbQuR902DNipAmiAy75XMCixMCzAJsP9XFE2Z0M=; b=dii/Kl1287JaEZ0D8ItR4EQ/k0yjARwdOMnsLnzFrjyX6uJnPz11HTwzGQ6lW1m9MK gmARlmRQlssCrdBiHVL6qGG9siQgrO0I/T+XzpNRntK8eAfXSxnAkGNWTo6zIIAfoV6A h96Ddb1lrvFI41pDbDfK0CWsBQNl8e/kxLCi26X5+mPWi7KG8HPgq1cQ9KPrTSdNhQb9 wlAk4Nz7CEcNq7zFlNKK/vWFUWIHcYSxEqLYBEeAZg3NxxF3Vr0hqBEBzE0JmYb8WUgU hD88MgQBuc5za49udmdBfcvV1MADuSLleR631oX3NyARoBfTUOXmnlIED7s39ICIWAp1 Ij4A== Return-Path: Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com. [209.85.128.44]) by smtp.gmail.com with ESMTPSA id s16sm167496edd.39.2019.10.26.12.33.36 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 26 Oct 2019 12:33:36 -0700 (PDT) Received: by mail-wm1-f44.google.com with SMTP id q70so5499152wme.1 for ; Sat, 26 Oct 2019 12:33:36 -0700 (PDT) MIME-Version: 1.0 References: <1572025151-22783-1-git-send-email-craig.blackmore@embecosm.com> <1572025151-22783-2-git-send-email-craig.blackmore@embecosm.com> In-Reply-To: From: Andrew Waterman Date: Sat, 26 Oct 2019 20:02:00 -0000 Message-ID: Subject: Re: [PATCH v2 1/2] RISC-V: Add shorten_memrefs pass To: Jeff Law Cc: Craig Blackmore , GCC Patches , Jim Wilson , Ofer Shinaar , Nidal.Faour@wdc.com, Kito Cheng Content-Type: text/plain; charset="UTF-8" X-SW-Source: 2019-10/txt/msg01904.txt.bz2 I don't know enough to say whether the legitimize_address hook is sufficient for the intended purpose, but I am sure that RISC-V's concerns are not unique: other GCC targets have to cope with offset-size constraints that are coupled to register-allocation constraints. On Sat, Oct 26, 2019 at 11:21 AM Jeff Law wrote: > > On 10/25/19 11:39 AM, Craig Blackmore wrote: > > This patch aims to allow more load/store instructions to be compressed by > > replacing a load/store of 'base register + large offset' with a new load/store > > of 'new base + small offset'. If the new base gets stored in a compressed > > register, then the new load/store can be compressed. Since there is an overhead > > in creating the new base, this change is only attempted when 'base register' is > > referenced in at least 4 load/stores in a basic block. > > > > The optimization is implemented in a new RISC-V specific pass called > > shorten_memrefs which is enabled for RVC targets. It has been developed for the > > 32-bit lw/sw instructions but could also be extended to 64-bit ld/sd in future. > > > > Tested on bare metal rv32i, rv32iac, rv32im, rv32imac, rv32imafc, rv64imac, > > rv64imafdc via QEMU. No regressions. > > > > gcc/ChangeLog: > > > > * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv. > > * config/riscv/riscv-passes.def: New file. > > * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare. > > * config/riscv/riscv-shorten-memrefs.c: New file. > > * config/riscv/riscv.c (tree-pass.h): New include. > > (riscv_compressed_reg_p): New Function > > (riscv_compressed_lw_offset_p): Likewise. > > (riscv_compressed_lw_address_p): Likewise. > > (riscv_shorten_lw_offset): Likewise. > > (riscv_legitimize_address): Attempt to convert base + large_offset > > to compressible new_base + small_offset. > > (riscv_address_cost): Make anticipated compressed load/stores > > cheaper for code size than uncompressed load/stores. > > (riscv_register_priority): Move compressed register check to > > riscv_compressed_reg_p. > > * config/riscv/riscv.h (RISCV_MAX_COMPRESSED_LW_OFFSET): Define. > > * config/riscv/riscv.opt (mshorten-memefs): New option. > > * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule. > > (PASSES_EXTRA): Add riscv-passes.def. > > * doc/invoke.texi: Document -mshorten-memrefs. > This has traditionally been done via the the legitimize_address hook. > Is there some reason that hook is insufficient for this case? > > The hook, IIRC, is called out explow.c. > > Jeff >