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[209.85.219.178]) by smtp.gmail.com with ESMTPSA id m10-20020a05620a290a00b006e2d087fd63sm986394qkp.63.2022.11.17.10.33.43 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Nov 2022 10:33:44 -0800 (PST) Received: by mail-yb1-f178.google.com with SMTP id k84so2913909ybk.3 for ; Thu, 17 Nov 2022 10:33:43 -0800 (PST) X-Received: by 2002:a25:da06:0:b0:6dd:8cf2:8ae7 with SMTP id n6-20020a25da06000000b006dd8cf28ae7mr3272746ybf.283.1668710023498; Thu, 17 Nov 2022 10:33:43 -0800 (PST) MIME-Version: 1.0 References: <20221113204858.4062163-1-philipp.tomsich@vrull.eu> In-Reply-To: <20221113204858.4062163-1-philipp.tomsich@vrull.eu> From: Andrew Waterman Date: Thu, 17 Nov 2022 10:33:32 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] RISC-V: Handle "(a & twobits) == singlebit" in branches using Zbs To: Philipp Tomsich Cc: gcc-patches@gcc.gnu.org, Christoph Muellner , Kito Cheng , Vineet Gupta , Jeff Law , Palmer Dabbelt Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Am I wrong to worry that this will increase dynamic instruction count when used in a loop? The obvious code is more efficient when the constant loads can be hoisted out of a loop. Or does the cost model account for this somehow? On Sun, Nov 13, 2022 at 12:50 PM Philipp Tomsich wrote: > > Use Zbs when generating a sequence for "if ((a & twobits) == singlebit) ..." > that can be expressed as bexti + bexti + andn. > > gcc/ChangeLog: > > * config/riscv/bitmanip.md (*branch_mask_twobits_equals_singlebit): > Handle "if ((a & T) == C)" using Zbs, when T has 2 bits set and C has one > of these tow bits set. > * config/riscv/predicates.md (const_twobits_operand): New predicate. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zbs-if_then_else-01.c: New test. > > Signed-off-by: Philipp Tomsich > --- > > gcc/config/riscv/bitmanip.md | 42 +++++++++++++++++++ > gcc/config/riscv/predicates.md | 5 +++ > .../gcc.target/riscv/zbs-if_then_else-01.c | 20 +++++++++ > 3 files changed, 67 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c > > diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md > index 7a8f4e35880..2cea394671f 100644 > --- a/gcc/config/riscv/bitmanip.md > +++ b/gcc/config/riscv/bitmanip.md > @@ -690,3 +690,45 @@ > "TARGET_ZBS" > [(set (match_dup 0) (zero_extract:X (match_dup 1) (const_int 1) (match_dup 2))) > (set (match_dup 0) (xor:X (match_dup 0) (const_int 1)))]) > + > +;; IF_THEN_ELSE: test for 2 bits of opposite polarity > +(define_insn_and_split "*branch_mask_twobits_equals_singlebit" > + [(set (pc) > + (if_then_else (match_operator 1 "equality_operator" > + [(and:X (match_operand:X 2 "register_operand" "r") > + (match_operand:X 3 "const_twobits_operand" "i")) > + (match_operand:X 4 "single_bit_mask_operand" "i")]) > + (label_ref (match_operand 0 "" "")) > + (pc))) > + (clobber (match_scratch:X 5 "=&r")) > + (clobber (match_scratch:X 6 "=&r"))] > + "TARGET_ZBS && TARGET_ZBB && !SMALL_OPERAND (INTVAL (operands[3]))" > + "#" > + "&& reload_completed" > + [(set (match_dup 5) (zero_extract:X (match_dup 2) > + (const_int 1) > + (match_dup 8))) > + (set (match_dup 6) (zero_extract:X (match_dup 2) > + (const_int 1) > + (match_dup 9))) > + (set (match_dup 6) (and:X (not:X (match_dup 6)) (match_dup 5))) > + (set (pc) (if_then_else (match_op_dup 1 [(match_dup 6) (const_int 0)]) > + (label_ref (match_dup 0)) > + (pc)))] > +{ > + unsigned HOST_WIDE_INT twobits_mask = UINTVAL (operands[3]); > + unsigned HOST_WIDE_INT singlebit_mask = UINTVAL (operands[4]); > + > + /* Make sure that the reference value has one of the bits of the mask set */ > + if ((twobits_mask & singlebit_mask) == 0) > + FAIL; > + > + int setbit = ctz_hwi (singlebit_mask); > + int clearbit = ctz_hwi (twobits_mask & ~singlebit_mask); > + > + operands[1] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == NE ? EQ : NE, > + mode, operands[6], GEN_INT(0)); > + > + operands[8] = GEN_INT (setbit); > + operands[9] = GEN_INT (clearbit); > +}) > diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md > index 490bff688a7..6e34829a59b 100644 > --- a/gcc/config/riscv/predicates.md > +++ b/gcc/config/riscv/predicates.md > @@ -321,6 +321,11 @@ > (and (match_code "const_int") > (match_test "popcount_hwi (~UINTVAL (op)) == 2"))) > > +;; A CONST_INT operand that has exactly two bits set. > +(define_predicate "const_twobits_operand" > + (and (match_code "const_int") > + (match_test "popcount_hwi (UINTVAL (op)) == 2"))) > + > ;; A CONST_INT operand that fits into the unsigned half of a > ;; signed-immediate after the top bit has been cleared. > (define_predicate "uimm_extra_bit_operand" > diff --git a/gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c b/gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c > new file mode 100644 > index 00000000000..d249a841ff9 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c > @@ -0,0 +1,20 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv64gc_zbb_zbs -mabi=lp64" } */ > +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O1" } } */ > + > +void g(); > + > +void f1 (long a) > +{ > + if ((a & ((1ul << 33) | (1 << 4))) == (1ul << 33)) > + g(); > +} > + > +void f2 (long a) > +{ > + if ((a & 0x12) == 0x10) > + g(); > +} > + > +/* { dg-final { scan-assembler-times "bexti\t" 2 } } */ > +/* { dg-final { scan-assembler-times "andn\t" 1 } } */ > -- > 2.34.1 >