From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by sourceware.org (Postfix) with ESMTPS id 159593858D37 for ; Thu, 18 Aug 2022 00:00:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 159593858D37 Received: by mail-pj1-x1029.google.com with SMTP id o14-20020a17090a0a0e00b001fabfd3369cso258501pjo.5 for ; Wed, 17 Aug 2022 17:00:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc; bh=o/F7kLxb1crstyKfqzOiLiAHr1KM+6ZuvEuzqQZPwZU=; b=Cw3YtEDAnawkI9taZk14YjrTj86LpyzFaqMVXj5we6CozEbTPsXIgGrW6aOsSUj/57 fXwjHxBnHILOXZh97iL1J6qpLTFXbXlCu6o4TKjnjQSilCiETlZzB9go3z/0ex2xWRp2 TV8bXV2SiQSJ6oWwq4ma/ooU1RIF/vAeBhuxTroMcAZveVhDMWzVQMf89gNRC0IRj9ev dPMTrXpjCYclIRPftu95218XGO5dIk38KY/LXyBB5nHGX1DDMNSfuxyNseR+S1yIhs/g oAqBtrH82e3gjHynYjmZXeT3j/yuZ+JzR0fxYJjU7IAiz2NoUObgIjAmKLcFklGdYG1U hbvw== X-Gm-Message-State: ACgBeo2yOGSa1VUWrOYErw8AiBIkpsN6nP3+Z+C2vRgcdqrY3np8jnuY PtByJxceeHG6BlimH1h2PXeq1Sazb1uU61ZD4LFBYIVMEag= X-Google-Smtp-Source: AA6agR53RqiK9Qa5Ot7ZJ/e5bBawyVYekHqqvdaLRH3aKFb/kuh19Zxr7TfAXKEY9eYHa2ga5LLN1LRniDsbNNaEUII= X-Received: by 2002:a17:90b:897:b0:1f5:3cbf:fc5e with SMTP id bj23-20020a17090b089700b001f53cbffc5emr420772pjb.180.1660780829823; Wed, 17 Aug 2022 17:00:29 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Andrew Pinski Date: Wed, 17 Aug 2022 17:00:17 -0700 Message-ID: Subject: Re: [PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI. To: Sudakshina Das Cc: "gcc-patches@gcc.gnu.org" , nd , James Greenhalgh , Richard Earnshaw , Marcus Shawcroft Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Aug 2022 00:00:34 -0000 On Fri, Nov 2, 2018 at 11:39 AM Sudakshina Das wrote: > > Hi > > This patch is part of a series that enables ARMv8.5-A in GCC and > adds Branch Target Identification Mechanism. > (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) > > This patch adds a new pass called "bti" which is triggered by the > command line argument -mbranch-protection whenever "bti" is turned on. > > The pass iterates through the instructions and adds appropriated BTI > instructions based on the following: > * Add a new "BTI C" at the beginning of a function, unless its already > protected by a "PACIASP/PACIBSP". We exempt the functions that are > only called directly. Coming back to this because the check only_called_directly_p does not work if the linker will insert a veneer as the compiler does not know about that. This is recorded as https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106671 . Thanks, Andrew Pinski > * Add a new "BTI J" for every target of an indirect jump, jump table > targets, non-local goto targets or labels that might be referenced > by variables, constant pools, etc (NOTE_INSN_DELETED_LABEL) > > Since we have already changed the use of indirect tail calls to only x16 > and x17, we do not have to use "BTI JC". > (check patch 3/6). > > Bootstrapped and regression tested with aarch64-none-linux-gnu. Added > new tests. > Is this ok for trunk? > > Thanks > Sudi > > *** gcc/ChangeLog *** > > 2018-xx-xx Sudakshina Das > Ramana Radhakrishnan > > * config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o. > * gcc/config/aarch64/aarch64.h: Update comment for > TRAMPOLINE_SIZE. > * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): > Update if bti is enabled. > * config/aarch64/aarch64-bti-insert.c: New file. > * config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert > bti pass. > * config/aarch64/aarch64-protos.h (make_pass_insert_bti): > Declare the new bti pass. > * config/aarch64/aarch64.md (bti_nop): Define. > * config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o. > > *** gcc/testsuite/ChangeLog *** > > 2018-xx-xx Sudakshina Das > > * gcc.target/aarch64/bti-1.c: New test. > * gcc.target/aarch64/bti-2.c: New test. > * lib/target-supports.exp > (check_effective_target_aarch64_bti_hw): Add new check for > BTI hw. >