From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 17079 invoked by alias); 18 Feb 2014 21:19:11 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 17067 invoked by uid 89); 18 Feb 2014 21:19:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-ve0-f176.google.com Received: from mail-ve0-f176.google.com (HELO mail-ve0-f176.google.com) (209.85.128.176) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 18 Feb 2014 21:19:09 +0000 Received: by mail-ve0-f176.google.com with SMTP id jx11so6903235veb.35 for ; Tue, 18 Feb 2014 13:19:07 -0800 (PST) MIME-Version: 1.0 X-Received: by 10.220.71.20 with SMTP id f20mr14849vcj.70.1392758347297; Tue, 18 Feb 2014 13:19:07 -0800 (PST) Received: by 10.58.195.199 with HTTP; Tue, 18 Feb 2014 13:19:07 -0800 (PST) In-Reply-To: <1392757787-25629-8-git-send-email-philipp.tomsich@theobroma-systems.com> References: <1392757787-25629-1-git-send-email-philipp.tomsich@theobroma-systems.com> <1392757787-25629-8-git-send-email-philipp.tomsich@theobroma-systems.com> Date: Tue, 18 Feb 2014 21:19:00 -0000 Message-ID: Subject: Re: [AArch64 07/14] Define additional patterns for adds/subs. From: Andrew Pinski To: Philipp Tomsich Cc: GCC Patches Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2014-02/txt/msg01078.txt.bz2 On Tue, Feb 18, 2014 at 1:09 PM, Philipp Tomsich wrote: Can you add a testcase or two for this? This should show why they are not matching before hand. Thanks, Andrew > --- > gcc/config/aarch64/aarch64.md | 49 +++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 49 insertions(+) > > diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md > index 90f1ee9..13a75d3 100644 > --- a/gcc/config/aarch64/aarch64.md > +++ b/gcc/config/aarch64/aarch64.md > @@ -1138,6 +1138,22 @@ > [(set_attr "type" "alus_reg,alus_imm,alus_imm")] > ) > > +;; alternative using the condition output only > +(define_insn "*add3_compare0_internal2" > + [(set (reg:CC_NZ CC_REGNUM) > + (compare:CC_NZ > + (plus:GPI (match_operand:GPI 1 "register_operand" "%r,r,r") > + (match_operand:GPI 2 "aarch64_plus_operand" "r,I,J")) > + (const_int 0))) > + (clobber (match_scratch:GPI 0 "=r,r,r"))] > + "" > + "@ > + adds\\t%0, %1, %2 > + adds\\t%0, %1, %2 > + subs\\t%0, %1, #%n2" > + [(set_attr "type" "alus_reg,alus_imm,alus_imm")] > +) > + > ;; zero_extend version of above > (define_insn "*addsi3_compare0_uxtw" > [(set (reg:CC_NZ CC_REGNUM) > @@ -1155,6 +1171,39 @@ > [(set_attr "type" "alus_reg,alus_imm,alus_imm")] > ) > > +;; variant of the above using a swapped condition/comparator > +(define_insn "*addsi3_compare0_uxtw_zeswp" > + [(set (reg:CC_ZESWP CC_REGNUM) > + (compare:CC_ZESWP > + (plus:SI (match_operand:SI 1 "register_operand" "%r,r,r") > + (match_operand:SI 2 "aarch64_plus_operand" "r,I,J")) > + (const_int 0))) > + (set (match_operand:DI 0 "register_operand" "=r,r,r") > + (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))] > + "" > + "@ > + adds\\t%w0, %w1, %w2 > + adds\\t%w0, %w1, %w2 > + subs\\t%w0, %w1, #%n2" > + [(set_attr "type" "alus_reg,alus_imm,alus_imm")] > +) > + > +;; alternative using the condition output only > +(define_insn "*addsi3_compare0_uxtw_zeswp_internal2" > + [(set (reg:CC_ZESWP CC_REGNUM) > + (compare:CC_ZESWP > + (plus:SI (match_operand:SI 1 "register_operand" "%r,r,r") > + (match_operand:SI 2 "aarch64_plus_operand" "r,I,J")) > + (const_int 0))) > + (clobber (match_scratch:DI 0 "=r,r,r"))] > + "" > + "@ > + adds\\t%w0, %w1, %w2 > + adds\\t%w0, %w1, %w2 > + subs\\t%w0, %w1, #%n2" > + [(set_attr "type" "alus_reg,alus_imm,alus_imm")] > +) > + > (define_insn "*adds_mul_imm_" > [(set (reg:CC_NZ CC_REGNUM) > (compare:CC_NZ > -- > 1.9.0 >