From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 32511 invoked by alias); 31 Aug 2017 17:23:47 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 32495 invoked by uid 89); 31 Aug 2017 17:23:45 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=no version=3.3.2 spammy= X-HELO: mail-qk0-f195.google.com Received: from mail-qk0-f195.google.com (HELO mail-qk0-f195.google.com) (209.85.220.195) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 31 Aug 2017 17:23:35 +0000 Received: by mail-qk0-f195.google.com with SMTP id a77so213866qkb.1 for ; Thu, 31 Aug 2017 10:23:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=NzhM7Mu5fHWdnn3kY5IkteG7GCGF7GSaajVF2AkPy2I=; b=PRqjp/uoCV4Jd3uHojwZvojXQmu5+g20sRTUt42ab3E+4wTIBfp3rAgp7Qq+jeHMxK K6IkMg8LOR6xHVmU+X9KDVzC+o62qXW0ILWVwhogz65I5NyzFR8BhPTd3ADdJ2RcIAq5 heOGHbV5rcWIqzQVy3D+rOEJtJyPPX5F3THZjvdD+v6sgIYW1K4PmC66mbCPkJhFtcpc x5W/Z87q+5K3js/VEQRMwg93Ci6yC3R5naDk2PgNLFauvOa5Ny39sd7kqJ3HyPyNF0SJ RHyeP4vrUrZX4BfSsFoZMIg2V5CdYpTj0nnkZce5lCSmAjffL0p2hiYFkRAlS57fgSUF nmMA== X-Gm-Message-State: AHYfb5iN4xFcdrFsSb/te2iSitJyVhp8O8LYXZDUw+av6bWVkZYfzZYF MX1Vssyxo3iW4n9tnwu9adBj/Td+GA== X-Google-Smtp-Source: ADKCNb6kYkIrgiVONiTnNj2EZL53An4s1n+flM6MzQk3AR8GJURGa2Pat+Dle5pj7pyvLWCEqedSgoq7wirtxGKtXm4= X-Received: by 10.55.164.214 with SMTP id n205mr5078306qke.28.1504200213602; Thu, 31 Aug 2017 10:23:33 -0700 (PDT) MIME-Version: 1.0 Received: by 10.140.97.119 with HTTP; Thu, 31 Aug 2017 10:23:32 -0700 (PDT) In-Reply-To: <59A8406F.9040800@foss.arm.com> References: <59368A74.2060908@foss.arm.com> <59527975.1060304@foss.arm.com> <5952939E.9010604@foss.arm.com> <59A8406F.9040800@foss.arm.com> From: Andrew Pinski Date: Thu, 31 Aug 2017 18:54:00 -0000 Message-ID: Subject: Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target. To: Renlin Li Cc: "gcc-patches@gcc.gnu.org" , James Greenhalgh , Ramana Radhakrishnan , Richard Earnshaw Content-Type: text/plain; charset="UTF-8" X-IsSubscribed: yes X-SW-Source: 2017-08/txt/msg01783.txt.bz2 On Thu, Aug 31, 2017 at 9:59 AM, Renlin Li wrote: > Hi all, > > This is a split patch from a discussion here: > https://gcc.gnu.org/ml/gcc-patches/2017-06/msg00289.html > > It contains the document part only. > It clarify the behavior when no modifier is used for register operand. > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 > > 'H' modifier is added for TImode register pair case. > > It only documents the most common cases I can think of. Any other > suggestions are welcome. > > Is Okay to trunk? >From my point of view this looks good. Thanks, Andrew > > Regards, > Renlin > > > gcc/ChangeLog: > > 2017-08-31 Renlin Li > > PR target/63359 > * doc/extend.texi (AArch64Operandmodifers): New section. > > > On 27/06/17 18:19, Renlin Li wrote: >> >> Hi Andrew, >> >> On 27/06/17 17:11, Andrew Pinski wrote: >>> >>> On Tue, Jun 27, 2017 at 8:27 AM, Renlin Li >>> wrote: >>>> >>>> Hi Andrew, >>>> >>>> On 25/06/17 22:38, Andrew Pinski wrote: >>>>> >>>>> >>>>> On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li >>>>> wrote: >>>>>> >>>>>> >>>>>> Hi all, >>>>>> >>>>>> In this patch, a new integer register operand modifier 'r' is added. >>>>>> This >>>>>> will use the >>>>>> proper register name according to the mode of corresponding operand. >>>>>> >>>>>> 'w' register for scalar integer mode smaller than DImode >>>>>> 'x' register for DImode >>>>>> >>>>>> This allows more flexibility and would meet people's expectations. >>>>>> It will help for ILP32 and LP64, and big-endian case. >>>>>> >>>>>> A new section is added to document the AArch64 operand modifiers which >>>>>> might >>>>>> be used in inline assembly. It's not an exhaustive list covers every >>>>>> modifier. >>>>>> Only the most common and useful ones are documented. >>>>>> >>>>>> The default behavior of integer operand without modifier is clearly >>>>>> documented >>>>>> as well. It's not changed so that the patch shouldn't break anything. >>>>>> >>>>>> So with this patch, it should resolve the issues in PR63359. >>>>>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 >>>>>> >>>>>> >>>>>> aarch64-none-elf regression test Okay. Okay to check in? >>>>> >>>>> >>>>> >>>>> I think 'r' modifier is very fragile and can be used incorrectly and >>>>> wrong in some cases really.. >>>> >>>> >>>> >>>> The user could always (or be encouraged to) opt to a strict register >>>> modifier to enforce consistent behavior in all cases. >>>> >>>> I agree the flexibility might bring unexpected behavior in corner cases. >>>> Do you have any examples to share off the top of your head? So that we >>>> can >>>> discuss the benefit and pitfalls, and decide to improve the patch or >>>> withdraw it. >>> >>> >>> One thing is TImode is missing. I have an use case of __int128_t >>> inside inline-asm. >>> For me %r and TImode would produce "x0, x1". This is one of the >>> reasons why I said it is fragile. >>> >> >> This is true. Actually, I intended to make 'r' only handle the simplest >> single >> integer register case. >> So that people won't believe it's a magic thing which could handle >> everything. >> I could improve the description about 'r' to clearly explain it's >> limitation. >> >> For TImode integer data, if 'r' is used, it will error >> "invalid 'asm': invalid operand mode for register modifier 'r'" >> >>>> >>>>> I like the documentation though. >>> >>> >>> As an aside %H is not documented here. Noticed it because I am using >>> %H with TImode. >> >> >> For the document as well, I only document those most common ones which >> might be used in >> inline assembly. It's good to know more use cases. >> I could add 'H' into the document. >> >> Regards, >> Renlin >> >>> >>> Thanks, >>> Andrew >>> >>>> >>>> Thanks, >>>> Renlin >>>> >>>> >>>>> >>>>> Thanks, >>>>> Andrew >>>>> >>>>>> >>>>>> gcc/ChangeLog: >>>>>> >>>>>> 2017-06-06 Renlin Li >>>>>> >>>>>> PR target/63359 >>>>>> * config/aarch64/aarch64.c (aarch64_print_operand): Add 'r' >>>>>> modifier. >>>>>> * doc/extend.texi (AArch64Operandmodifiers): New section.