* [PATCH] Fix PR target/103100 -mstrict-align and memset on not aligned buffers
@ 2021-11-06 5:25 apinski
2021-11-17 9:38 ` Richard Sandiford
0 siblings, 1 reply; 3+ messages in thread
From: apinski @ 2021-11-06 5:25 UTC (permalink / raw)
To: gcc-patches; +Cc: Andrew Pinski
From: Andrew Pinski <apinski@marvell.com>
The problem here is with -mstrict-align, aarch64_expand_setmem needs
to check the alginment of the mode to make sure we can use it for
doing the stores.
gcc/ChangeLog:
PR target/103100
* config/aarch64/aarch64.c (aarch64_expand_setmem):
Add check for alignment of the mode if STRICT_ALIGNMENT is true.
---
gcc/config/aarch64/aarch64.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index fdf05505846..2c00583e12c 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -23738,7 +23738,9 @@ aarch64_expand_setmem (rtx *operands)
over writing. */
opt_scalar_int_mode mode_iter;
FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
- if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_limit))
+ if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_limit)
+ && (!STRICT_ALIGNMENT
+ || MEM_ALIGN (dst) >= GET_MODE_ALIGNMENT (mode_iter.require ())))
cur_mode = mode_iter.require ();
gcc_assert (cur_mode != BLKmode);
--
2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] Fix PR target/103100 -mstrict-align and memset on not aligned buffers
2021-11-06 5:25 [PATCH] Fix PR target/103100 -mstrict-align and memset on not aligned buffers apinski
@ 2021-11-17 9:38 ` Richard Sandiford
2021-11-18 6:35 ` Andrew Pinski
0 siblings, 1 reply; 3+ messages in thread
From: Richard Sandiford @ 2021-11-17 9:38 UTC (permalink / raw)
To: apinski--- via Gcc-patches; +Cc: apinski
apinski--- via Gcc-patches <gcc-patches@gcc.gnu.org> writes:
> From: Andrew Pinski <apinski@marvell.com>
>
> The problem here is with -mstrict-align, aarch64_expand_setmem needs
> to check the alginment of the mode to make sure we can use it for
> doing the stores.
>
> gcc/ChangeLog:
>
> PR target/103100
> * config/aarch64/aarch64.c (aarch64_expand_setmem):
> Add check for alignment of the mode if STRICT_ALIGNMENT is true.
> ---
> gcc/config/aarch64/aarch64.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index fdf05505846..2c00583e12c 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -23738,7 +23738,9 @@ aarch64_expand_setmem (rtx *operands)
> over writing. */
> opt_scalar_int_mode mode_iter;
> FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
> - if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_limit))
> + if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_limit)
> + && (!STRICT_ALIGNMENT
> + || MEM_ALIGN (dst) >= GET_MODE_ALIGNMENT (mode_iter.require ())))
Sorry for the slow review. I think instead we should have keep
track of the alignment of the start byte. This will be MEM_ALIGN
for the first iteration but could decrease after writing some bytes.
The net effect should be the same in practice. It just seems
more robust.
Thanks,
Richard
> cur_mode = mode_iter.require ();
>
> gcc_assert (cur_mode != BLKmode);
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] Fix PR target/103100 -mstrict-align and memset on not aligned buffers
2021-11-17 9:38 ` Richard Sandiford
@ 2021-11-18 6:35 ` Andrew Pinski
0 siblings, 0 replies; 3+ messages in thread
From: Andrew Pinski @ 2021-11-18 6:35 UTC (permalink / raw)
To: Richard Sandiford, apinski--- via Gcc-patches, Andrew Pinski
On Wed, Nov 17, 2021 at 1:39 AM Richard Sandiford via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> apinski--- via Gcc-patches <gcc-patches@gcc.gnu.org> writes:
> > From: Andrew Pinski <apinski@marvell.com>
> >
> > The problem here is with -mstrict-align, aarch64_expand_setmem needs
> > to check the alginment of the mode to make sure we can use it for
> > doing the stores.
> >
> > gcc/ChangeLog:
> >
> > PR target/103100
> > * config/aarch64/aarch64.c (aarch64_expand_setmem):
> > Add check for alignment of the mode if STRICT_ALIGNMENT is true.
> > ---
> > gcc/config/aarch64/aarch64.c | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> > index fdf05505846..2c00583e12c 100644
> > --- a/gcc/config/aarch64/aarch64.c
> > +++ b/gcc/config/aarch64/aarch64.c
> > @@ -23738,7 +23738,9 @@ aarch64_expand_setmem (rtx *operands)
> > over writing. */
> > opt_scalar_int_mode mode_iter;
> > FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
> > - if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_limit))
> > + if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_limit)
> > + && (!STRICT_ALIGNMENT
> > + || MEM_ALIGN (dst) >= GET_MODE_ALIGNMENT (mode_iter.require ())))
>
> Sorry for the slow review. I think instead we should have keep
> track of the alignment of the start byte. This will be MEM_ALIGN
> for the first iteration but could decrease after writing some bytes.
>
> The net effect should be the same in practice. It just seems
> more robust.
So looking into this loop further, I think it really needs a rewrite :).
Currently it is not a greedy loop, instead it iterates for each copy
it does and loops over the modes each time too.
Let me rewrite the loop so it is better.
Thanks,
Andrew
>
> Thanks,
> Richard
>
> > cur_mode = mode_iter.require ();
> >
> > gcc_assert (cur_mode != BLKmode);
^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-11-06 5:25 [PATCH] Fix PR target/103100 -mstrict-align and memset on not aligned buffers apinski
2021-11-17 9:38 ` Richard Sandiford
2021-11-18 6:35 ` Andrew Pinski
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