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From: Hongyu Wang <wwwhhhyyy333@gmail.com>
To: Hongtao Liu <crazylht@gmail.com>
Cc: Hongyu Wang <hongyu.wang@intel.com>,
	gcc-patches@gcc.gnu.org, hongtao.liu@intel.com
Subject: Re: [PATCH] i386: [APX] Document inline asm behavior and new switch for APX
Date: Wed, 10 Jan 2024 16:00:53 +0800	[thread overview]
Message-ID: <CA+OydWmZQ1Bcjq9pUC42Soy1wJBd-db7wqvG1GB-A8a9Kg5LYw@mail.gmail.com> (raw)
In-Reply-To: <CAMZc-bwh5YhhVkh+amWUtUg6pifxWTDYUshT57-SgUC0qfw3Bw@mail.gmail.com>

[-- Attachment #1: Type: text/plain, Size: 2338 bytes --]

Thanks, this is the patch I'm going to check-in

Hongtao Liu <crazylht@gmail.com> 于2024年1月10日周三 16:02写道:
>
> On Tue, Jan 9, 2024 at 3:09 PM Hongyu Wang <hongyu.wang@intel.com> wrote:
> >
> > Hi,
> >
> > For APX, the inline asm behavior was not mentioned in any document
> > before. Add description for it.
> >
> > Ok for trunk?
> >
> > gcc/ChangeLog:
> >
> >         * config/i386/i386.opt: Adjust document.
> >         * doc/invoke.texi: Add description for
> >         -mapx-inline-asm-use-gpr32.
> > ---
> >  gcc/config/i386/i386.opt | 3 +--
> >  gcc/doc/invoke.texi      | 7 +++++++
> >  2 files changed, 8 insertions(+), 2 deletions(-)
> >
> > diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
> > index a38e92baf92..5b4f1bff25f 100644
> > --- a/gcc/config/i386/i386.opt
> > +++ b/gcc/config/i386/i386.opt
> > @@ -1357,8 +1357,7 @@ Enum(apx_features) String(all) Value(apx_all) Set(1)
> >
> >  mapx-inline-asm-use-gpr32
> >  Target Var(ix86_apx_inline_asm_use_gpr32) Init(0)
> > -Enable GPR32 in inline asm when APX_EGPR enabled, do not
> > -hook reg or mem constraint in inline asm to GPR16.
> > +Enable GPR32 in inline asm when APX_F enabled.
> >
> >  mevex512
> >  Target Mask(ISA2_EVEX512) Var(ix86_isa_flags2) Save
> > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> > index 68d1f364ac0..47fd96648d8 100644
> > --- a/gcc/doc/invoke.texi
> > +++ b/gcc/doc/invoke.texi
> > @@ -35272,6 +35272,13 @@ r8-r15 registers so that the call and jmp instruction length is 6 bytes
> >  to allow them to be replaced with @samp{lfence; call *%r8-r15} or
> >  @samp{lfence; jmp *%r8-r15} at run-time.
> >
> > +@opindex mapx-inline-asm-use-gpr32
> > +@item -mapx-inline-asm-use-gpr32
> > +When APX_F enabled, EGPR usage was by default disabled to prevent
> > +unexpected EGPR generation in instructions that does not support it.
> > +To invoke EGPR usage in inline asm, use this switch to allow EGPR in
> > +inline asm, while user should ensure the asm actually supports EGPR.
> Please align with
> https://gcc.gnu.org/pipermail/gcc-patches/2024-January/642228.html.
> Ok after changing that.
> > +
> >  @end table
> >
> >  These @samp{-m} switches are supported in addition to the above
> > --
> > 2.31.1
> >
>
>
> --
> BR,
> Hongtao

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From 7de5bb642c1265ff57a009dd889ab435b098bfca Mon Sep 17 00:00:00 2001
From: Hongyu Wang <hongyu.wang@intel.com>
Date: Tue, 9 Jan 2024 15:00:21 +0800
Subject: [PATCH] i386: [APX] Document inline asm behavior and new switch for
 APX

For APX, the inline asm behavior was not mentioned in any document
before. Add description for it.

gcc/ChangeLog:

	* config/i386/i386.opt: Adjust document.
	* doc/invoke.texi: Add description for
	-mapx-inline-asm-use-gpr32.
---
 gcc/config/i386/i386.opt | 3 +--
 gcc/doc/invoke.texi      | 8 ++++++++
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index a38e92baf92..5b4f1bff25f 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -1357,8 +1357,7 @@ Enum(apx_features) String(all) Value(apx_all) Set(1)
 
 mapx-inline-asm-use-gpr32
 Target Var(ix86_apx_inline_asm_use_gpr32) Init(0)
-Enable GPR32 in inline asm when APX_EGPR enabled, do not
-hook reg or mem constraint in inline asm to GPR16.
+Enable GPR32 in inline asm when APX_F enabled.
 
 mevex512
 Target Mask(ISA2_EVEX512) Var(ix86_isa_flags2) Save
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index a494420e24e..216e2f594d1 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -35272,6 +35272,14 @@ r8-r15 registers so that the call and jmp instruction length is 6 bytes
 to allow them to be replaced with @samp{lfence; call *%r8-r15} or
 @samp{lfence; jmp *%r8-r15} at run-time.
 
+@opindex mapx-inline-asm-use-gpr32
+@item -mapx-inline-asm-use-gpr32
+For inline asm support with APX, by default the EGPR feature was
+disabled to prevent potential illegal instruction with EGPR occurs.
+To invoke egpr usage in inline asm, use new compiler option
+-mapx-inline-asm-use-gpr32 and user should ensure the instruction
+supports EGPR.
+
 @end table
 
 These @samp{-m} switches are supported in addition to the above
-- 
2.31.1


  reply	other threads:[~2024-01-10  8:08 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-09  7:07 Hongyu Wang
2024-01-10  8:10 ` Hongtao Liu
2024-01-10  8:00   ` Hongyu Wang [this message]
2024-01-10 23:06   ` Andi Kleen
2024-01-11  3:28     ` Hongtao Liu

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