From: Hongyu Wang <wwwhhhyyy333@gmail.com>
To: gcc-patches@gcc.gnu.org, kirill.yukhin@gmail.com
Subject: Re: [PATCH] Enable GCC support for AMX
Date: Tue, 7 Jul 2020 11:24:58 +0800 [thread overview]
Message-ID: <CA+OydWnSDMuf2crz6ms2qHAJ5Zo4cWjrbsqPGP_nDXngvx_DpA@mail.gmail.com> (raw)
In-Reply-To: <CA+OydWmQ-HS2ORARSpv5eZuGVb3JyiL5GqcCUFkT-ugx-d4Wwg@mail.gmail.com>
Hi Kirill, could you help review this patch?
Hongyu Wang <wwwhhhyyy333@gmail.com> 于2020年7月6日周一 上午9:58写道:
>
> Hi:
>
> This patch is about to support Intel Advanced Matrix Extensions (AMX)
> which will be enabled in GLC.
>
> AMX is a new 64-bit programming paradigm consisting of two
> compo nents: a set of 2-dimensional registers (tiles) representing
> sub-arrays from a larger 2-dimensional memory image,
> and an accelerator able to operate on tiles
>
> Supported instructions are
>
> AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease
> AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud
> AMX-BF16:tdpbf16ps
>
> The intrinsics adopts constant tile register number as its input parameters.
>
> For detailed information, please refer to
> https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
>
> Bootstrap ok, regression test on i386/x86 backend is ok.
>
> OK for master?
>
> gcc/ChangeLog
>
> * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET,
> OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET,
> OPTION_MASK_ISA2_AMX_TILE_UNSET,
> OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET):
> New marcos.
> (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16.
> * common/config/i386/i386-cpuinfo.h (processor_types): Add
> FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16.
> * common/config/i386/cpuinfo.h (XSTATE_TILECFG,
> XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro.
> (get_available_features): Enable AMX features only if
> their states are suoorited by OSXSAVE.
> * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY
> for amx-tile, amx-int8, amx-bf16.
> * config.gcc: Add amxtileintrin.h, amxint8intrin.h,
> amxbf16intrin.h to extra headers.
> * config/i386/amxbf16intrin.h: New file.
> * config/i386/amxint8intrin.h: Ditto.
> * config/i386/amxtileintrin.h: Ditto.
> * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8):
> New macro.
> * config/i386/i386-c.c (ix86_target_macros_internal): Define
> __AMX_TILE__, __AMX_INT8__, AMX_BF16__.
> * config/i386/i386-options.c (ix86_target_string): Add
> -mamx-tile, -mamx-int8, -mamx-bf16.
> (ix86_option_override_internal): Handle AMX-TILE,
> AMX-INT8, AMX-BF16.
> * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P,
> TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P,
> PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros.
> * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16.
> * config/i386/immintrin.h: Include amxtileintrin.h,
> amxint8intrin.h, amxbf16intrin.h.
> * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16.
> * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16.
> * doc/sourcebuild.texi ((Effective-Target Keywords, Other
> hardware attributes): Document amx_int8, amx_tile, amx_bf16.
>
> gcc/testsuite/ChangeLog
>
> * lib/target-supports.exp (check_effective_target_amx_tile,
> check_effective_target_amx_int8,
> check_effective_target_amx_bf16): New proc.
> * g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16.
> * g++.dg/other/i386-3.C: Ditto.
> * gcc.target/i386/sse-12.c: Ditto.
> * gcc.target/i386/sse-13.c: Ditto.
> * gcc.target/i386/sse-14.c: Ditto.
> * gcc.target/i386/sse-22.c: Ditto.
> * gcc.target/i386/sse-23.c: Ditto.
> * gcc.target/i386/funcspec-56.inc: Add new target attribute.
> * gcc.target/i386/amxbf16-asmatt-1.c: New test.
> * gcc.target/i386/amxint8-asmatt-1.c: Ditto.
> * gcc.target/i386/amxtile-asmatt-1.c: Ditto.
> * gcc.target/i386/amxbf16-asmintel-1.c: Ditto.
> * gcc.target/i386/amxint8-asmintel-1.c: Ditto.
> * gcc.target/i386/amxtile-asmintel-1.c: Ditto.
> * gcc.target/i386/amxbf16-asmatt-2.c: Ditto.
> * gcc.target/i386/amxint8-asmatt-2.c: Ditto.
> * gcc.target/i386/amxtile-asmatt-2.c: Ditto.
> * gcc.target/i386/amxbf16-asmintel-2.c: Ditto.
> * gcc.target/i386/amxint8-asmintel-2.c: Ditto.
> * gcc.target/i386/amxtile-asmintel-2.c: Ditto.
next prev parent reply other threads:[~2020-07-07 3:28 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-06 1:58 Hongyu Wang
2020-07-07 3:24 ` Hongyu Wang [this message]
2020-07-17 5:40 ` Hongyu Wang
2020-07-24 5:41 ` Hongyu Wang
2020-08-04 12:17 ` Hongyu Wang
2020-08-04 14:47 ` Kirill Yukhin
2020-08-04 15:40 ` Hongyu Wang
2020-09-01 1:31 ` Hongyu Wang
2020-09-03 15:07 ` Kirill Yukhin
2020-09-03 15:17 ` H.J. Lu
2020-09-04 14:01 ` Kirill Yukhin
2020-09-11 17:00 ` Hongyu Wang
2020-09-18 8:31 ` Hongyu Wang
2020-09-30 11:51 ` [committed] testsuite: Fix up amx* dg-do run tests with older binutils Jakub Jelinek
2020-09-30 14:05 ` Hongyu Wang
2020-09-28 11:38 ` [PATCH] Enable GCC support for AMX Kirill Yukhin
2020-09-28 12:07 ` Hongyu Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CA+OydWnSDMuf2crz6ms2qHAJ5Zo4cWjrbsqPGP_nDXngvx_DpA@mail.gmail.com \
--to=wwwhhhyyy333@gmail.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=kirill.yukhin@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).