From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt1-x82f.google.com (mail-qt1-x82f.google.com [IPv6:2607:f8b0:4864:20::82f]) by sourceware.org (Postfix) with ESMTPS id 62B6D3889824 for ; Sat, 26 Mar 2022 02:04:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 62B6D3889824 Received: by mail-qt1-x82f.google.com with SMTP id s11so8012835qtc.3 for ; Fri, 25 Mar 2022 19:04:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=qkyJlzo8Eupk+SaDE0So5VKFEwMPWmJFjIzP7FZNh2E=; b=U8ELvDgNOZfcsrxD0ffkr9x9CJj/IciqQnqEsgR0qlN481B563+CJsxFKM0l0V9z2o ZZaDpjVuloTZYR0xVIZSd9OExBb0n52VbhXd1wy8o6Tg85Nmbn+DDB5yoKPgl7j422Qg BMCcPaPz/aLgxq+fml141PcloH3IM8xRKFRtyxxcyS1tBbjUTj9Yo8eMpxaotTE0hAW/ ENOYgEHKNXTqde4gWlqopemrgY3yebiFNVXvvLdxdnxx6JQ1+OITCwrbDoulTBUbGpoO ul9ETo7d4J3gqweRLxeIB/2VpRd871WdyFgRjmWdEBj6Po96L7FRL8qlUAzad6qOJ/CX bbTg== X-Gm-Message-State: AOAM53256Im87K4NjcvjUPDFa8ixrQW1NTJD9ka9OBXyZmvAsek30mDy xBoQD+tYEaZDeAIfGoWb58Y56ZmQj/3T3AwamzU= X-Google-Smtp-Source: ABdhPJwe13f4cUSXxCQ5Lw4PW0HlyMZ4M3YhxANYs1xcnCLwWtYo4W9+vyvU+t1dnlM3s3QB86bncYgNz3H3Ljp3vMw= X-Received: by 2002:ac8:7d83:0:b0:2e1:eca2:afb0 with SMTP id c3-20020ac87d83000000b002e1eca2afb0mr12225187qtd.521.1648260270493; Fri, 25 Mar 2022 19:04:30 -0700 (PDT) MIME-Version: 1.0 References: <20220325205014.32895-1-hjl.tools@gmail.com> In-Reply-To: From: Hongyu Wang Date: Sat, 26 Mar 2022 10:04:20 +0800 Message-ID: Subject: Re: [PATCH] x86: Use x constraint on KL patterns To: "H.J. Lu" Cc: GCC Patches , liuhongt Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-6.5 required=5.0 tests=BAYES_00, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 26 Mar 2022 02:04:33 -0000 > > Is it possible to create a test case that gas would throw an error for > > invalid operands? > > You can use -ffix-xmmN to disable XMM0-15. I mean can we create an intrinsic test for this PR that produces xmm16-31? And the -ffix-xmmN is an option for assembler or compiler? I didn't find it in document. H.J. Lu =E4=BA=8E2022=E5=B9=B43=E6=9C=8826=E6=97=A5= =E5=91=A8=E5=85=AD 09:22=E5=86=99=E9=81=93=EF=BC=9A > > On Fri, Mar 25, 2022 at 6:08 PM Hongyu Wang wrot= e: > > > > Is it possible to create a test case that gas would throw an error for > > invalid operands? > > You can use -ffix-xmmN to disable XMM0-15. > > > H.J. Lu via Gcc-patches =E4=BA=8E2022=E5=B9= =B43=E6=9C=8826=E6=97=A5=E5=91=A8=E5=85=AD 04:50=E5=86=99=E9=81=93=EF=BC=9A > > > > > > Since KL instructions have no AVX512 version, replace the "v" registe= r > > > constraint with the "x" register constraint. > > > > > > PR target/105058 > > > * config/i386/sse.md (loadiwkey): Replace "v" with "x". > > > (aesu8): Likewise. > > > --- > > > gcc/config/i386/sse.md | 6 +++--- > > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > > > index 29802d00ce6..33bd2c4768a 100644 > > > --- a/gcc/config/i386/sse.md > > > +++ b/gcc/config/i386/sse.md > > > @@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps__mask" > > > > > > ;; KEYLOCKER > > > (define_insn "loadiwkey" > > > - [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "= v") > > > - (match_operand:V2DI 1 "register_operand" "v= ") > > > + [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "= x") > > > + (match_operand:V2DI 1 "register_operand" "x= ") > > > (match_operand:V2DI 2 "register_operand" "Y= z") > > > (match_operand:SI 3 "register_operand" "a= ")] > > > UNSPECV_LOADIWKEY) > > > @@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant > > > (UNSPECV_AESENC256KLU8 "enc256kl")]) > > > > > > (define_insn "aesu8" > > > - [(set (match_operand:V2DI 0 "register_operand" "=3Dv") > > > + [(set (match_operand:V2DI 0 "register_operand" "=3Dx") > > > (unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operan= d" "0") > > > (match_operand:BLK 2 "memory_operand= " "m")] > > > AESDECENCKL)) > > > -- > > > 2.35.1 > > > > > > > -- > H.J.