From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by sourceware.org (Postfix) with ESMTPS id 9DDDB3858C52 for ; Thu, 10 Nov 2022 02:27:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9DDDB3858C52 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ej1-x62d.google.com with SMTP id 13so1674270ejn.3 for ; Wed, 09 Nov 2022 18:27:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=e6WJMV3v+799BVpXnnVc6RZzSLshFfEaZWxcKPgcG/Y=; b=R0kIIqyx2AfS1ldfbZbP7GFOT4XNCc0pe05epkgYHrp0yqzoLJNXH6545g+0qQTPH/ fky9UST5NMOEsuLb1LbR1pUwmDwTZfIudpM2AtOTqzRKWjuXCqaJS8R5kk3uLRqQhaon 4WFCXXrwBu44glTyyOxtjCcRWZP6Ga8e3sNyO6z14EJVKP9evZHbqvbux4qsD3MhxlDo Ek3RZFYyn31WVPze1jF0Dg570jcaqcMQw4z1fS8D039rrSXfIyCuh4AfCeCowKph8R8j N7OvApyYOWd8dmzHjEo+13QPQsxOY0ROt0BDoyP/WvnFExo3eLzuMErJPm1U0djDuvPF YFJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=e6WJMV3v+799BVpXnnVc6RZzSLshFfEaZWxcKPgcG/Y=; b=3P2j36n3tQwZj3E54aW+9nXpZAhTx9atyCxrJrwln1cSzASm2+ocKtYREQzg23/bX9 +kc1+EdM0fYLiLS/Q9XVrLN/ZLkphFAP72JD9L8C17J4QvITVEoVHUPlziJYRqmXRCnF ceuWxy+7xSVOuSwK84Y9/8HqeXmIlqpv0V5b48Dtsz2adCRcFA8lcjt5IS/yIJv9LmTc s3H38Kj+af1mMR6rOjyBelBmc4Yxk4wY5FIRmm9h3+1Cp8wPdLGOA5a/3c+PFFQlRTSr opHq6eo0jD2VT7LKDtXFXuF4LRGHL18JBkewjJzzIwTIid481IuVRfWQpMxShy0orjEx qpJA== X-Gm-Message-State: ACrzQf0c8RXLpA7X8I6LRHAuIDs3QrbdgwYcc2xwE/CCzStn/opw/iNh m4IkiCebdBotQyJBbzdcsQNinXC5zbFa/oUcIhI= X-Google-Smtp-Source: AMsMyM4sBqPJ7NSn/2VGMvYqLA620IzTg37H3lXamvrYNhHrJqCVqvVqf2yq8MW3fLwpqNqGb/myBT8cN6s03QM7uZ0= X-Received: by 2002:a17:907:175a:b0:7ad:d408:3a2b with SMTP id lf26-20020a170907175a00b007add4083a2bmr2123046ejc.280.1668047269086; Wed, 09 Nov 2022 18:27:49 -0800 (PST) MIME-Version: 1.0 References: <20221104000432.15254-1-hongyu.wang@intel.com> In-Reply-To: From: Hongyu Wang Date: Thu, 10 Nov 2022 10:22:35 +0800 Message-ID: Subject: Re: [PATCH] Optimize VEC_PERM_EXPR with same permutation index and operation [PR98167] To: Richard Biener Cc: Prathamesh Kulkarni , Richard Sandiford , Hongyu Wang , hongtao.liu@intel.com, gcc-patches@gcc.gnu.org Content-Type: multipart/mixed; boundary="000000000000f198b005ed148436" X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --000000000000f198b005ed148436 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Prathamesh and Richard, Thanks for the review and nice suggestions! > > I guess the transform should work as long as mask is same for both > > vectors even if it's > > not constant ? > > Yes, please change accordingly (and maybe push separately). > Removed VECTOR_CST for integer ops. > > If this transform is meant only for VLS vectors, I guess you should > > bail out if TYPE_VECTOR_SUBPARTS is not constant, > > otherwise it will crash for VLA vectors. > > I suppose it's difficult to create a VLA permute that covers all elements > and that is not trivial though. But indeed add ().is_constant to the > VECTOR_FLOAT_TYPE_P guard. Added. > Meh, that's quadratic! I suggest to check .encoding ().encoded_full_vect= or_p () > (as said I can't think of a non-full encoding that isn't trivial > but covers all elements) and then simply .qsort () the vector_builder > (it derives > from vec<>) so the scan is O(n log n). The .qsort () approach requires an extra cmp_func that IMO would not be feasible to be implemented in match.pd (I suppose lambda function would not be a good idea either). Another solution would be using hash_set but it does not work here for int64_t or poly_int64 type. So I kept current O(n^2) simple code here, and I suppose usually the permutation indices would be a small number even for O(n^2) complexity. Attached updated patch. Richard Biener via Gcc-patches =E4=BA=8E2022=E5= =B9=B411=E6=9C=888=E6=97=A5=E5=91=A8=E4=BA=8C 22:38=E5=86=99=E9=81=93=EF=BC= =9A > > On Fri, Nov 4, 2022 at 7:44 AM Prathamesh Kulkarni via Gcc-patches > wrote: > > > > On Fri, 4 Nov 2022 at 05:36, Hongyu Wang via Gcc-patches > > wrote: > > > > > > Hi, > > > > > > This is a follow-up patch for PR98167 > > > > > > The sequence > > > c1 =3D VEC_PERM_EXPR (a, a, mask) > > > c2 =3D VEC_PERM_EXPR (b, b, mask) > > > c3 =3D c1 op c2 > > > can be optimized to > > > c =3D a op b > > > c3 =3D VEC_PERM_EXPR (c, c, mask) > > > for all integer vector operation, and float operation with > > > full permutation. > > > > > > Bootstrapped & regrtested on x86_64-pc-linux-gnu. > > > > > > Ok for trunk? > > > > > > gcc/ChangeLog: > > > > > > PR target/98167 > > > * match.pd: New perm + vector op patterns for int and fp vect= or. > > > > > > gcc/testsuite/ChangeLog: > > > > > > PR target/98167 > > > * gcc.target/i386/pr98167.c: New test. > > > --- > > > gcc/match.pd | 49 +++++++++++++++++++++++= ++ > > > gcc/testsuite/gcc.target/i386/pr98167.c | 44 ++++++++++++++++++++++ > > > 2 files changed, 93 insertions(+) > > > create mode 100644 gcc/testsuite/gcc.target/i386/pr98167.c > > > > > > diff --git a/gcc/match.pd b/gcc/match.pd > > > index 194ba8f5188..b85ad34f609 100644 > > > --- a/gcc/match.pd > > > +++ b/gcc/match.pd > > > @@ -8189,3 +8189,52 @@ and, > > > (bit_and (negate @0) integer_onep@1) > > > (if (!TYPE_OVERFLOW_SANITIZED (type)) > > > (bit_and @0 @1))) > > > + > > > +/* Optimize > > > + c1 =3D VEC_PERM_EXPR (a, a, mask) > > > + c2 =3D VEC_PERM_EXPR (b, b, mask) > > > + c3 =3D c1 op c2 > > > + --> > > > + c =3D a op b > > > + c3 =3D VEC_PERM_EXPR (c, c, mask) > > > + For all integer non-div operations. */ > > > +(for op (plus minus mult bit_and bit_ior bit_xor > > > + lshift rshift) > > > + (simplify > > > + (op (vec_perm @0 @0 VECTOR_CST@2) (vec_perm @1 @1 VECTOR_CST@2)) > > > + (if (VECTOR_INTEGER_TYPE_P (type)) > > > + (vec_perm (op @0 @1) (op @0 @1) @2)))) > > Just wondering, why should mask be CST here ? > > I guess the transform should work as long as mask is same for both > > vectors even if it's > > not constant ? > > Yes, please change accordingly (and maybe push separately). > > > > + > > > +/* Similar for float arithmetic when permutation constant covers > > > + all vector elements. */ > > > +(for op (plus minus mult) > > > + (simplify > > > + (op (vec_perm @0 @0 VECTOR_CST@2) (vec_perm @1 @1 VECTOR_CST@2)) > > > + (if (VECTOR_FLOAT_TYPE_P (type)) > > > + (with > > > + { > > > + tree perm_cst =3D @2; > > > + vec_perm_builder builder; > > > + bool full_perm_p =3D false; > > > + if (tree_to_vec_perm_builder (&builder, perm_cst)) > > > + { > > > + /* Create a vec_perm_indices for the integer vector. */ > > > + int nelts =3D TYPE_VECTOR_SUBPARTS (type).to_constant (); > > If this transform is meant only for VLS vectors, I guess you should > > bail out if TYPE_VECTOR_SUBPARTS is not constant, > > otherwise it will crash for VLA vectors. > > I suppose it's difficult to create a VLA permute that covers all elements > and that is not trivial though. But indeed add ().is_constant to the > VECTOR_FLOAT_TYPE_P guard. > > > > > Thanks, > > Prathamesh > > > + vec_perm_indices sel (builder, 1, nelts); > > > + > > > + /* Check if perm indices covers all vector elements. */ > > > + int count =3D 0, i, j; > > > + for (i =3D 0; i < nelts; i++) > > > + for (j =3D 0; j < nelts; j++) > > Meh, that's quadratic! I suggest to check .encoding ().encoded_full_vect= or_p () > (as said I can't think of a non-full encoding that isn't trivial > but covers all elements) and then simply .qsort () the vector_builder > (it derives > from vec<>) so the scan is O(n log n). > > Maybe Richard has a better idea here though. > > Otherwise looks OK, though with these kind of (* (op ..) (op ..)) pattern= s it's > always that they explode the match decision tree, we'd ideally have a way= to > match those with (op ..) (op ..) first to be able to share more of the ma= tching > code. That said, match.pd is a less than ideal place for these (but most= ly > because of the way we code generate *-match.cc) > > Richard. > > > > + { > > > + if (sel[j].to_constant () =3D=3D i) > > > + { > > > + count++; > > > + break; > > > + } > > > + } > > > + full_perm_p =3D count =3D=3D nelts; > > > + } > > > + } > > > + (if (full_perm_p) > > > + (vec_perm (op @0 @1) (op @0 @1) @2)))))) > > > diff --git a/gcc/testsuite/gcc.target/i386/pr98167.c b/gcc/testsuite/= gcc.target/i386/pr98167.c > > > new file mode 100644 > > > index 00000000000..40e0ac11332 > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/i386/pr98167.c > > > @@ -0,0 +1,44 @@ > > > +/* PR target/98167 */ > > > +/* { dg-do compile } */ > > > +/* { dg-options "-O2 -mavx2" } */ > > > + > > > +/* { dg-final { scan-assembler-times "vpshufd\t" 8 } } */ > > > +/* { dg-final { scan-assembler-times "vpermilps\t" 3 } } */ > > > + > > > +#define VEC_PERM_4 \ > > > + 2, 3, 1, 0 > > > +#define VEC_PERM_8 \ > > > + 4, 5, 6, 7, 3, 2, 1, 0 > > > +#define VEC_PERM_16 \ > > > + 8, 9, 10, 11, 12, 13, 14, 15, 7, 6, 5, 4, 3, 2, 1, 0 > > > + > > > +#define TYPE_PERM_OP(type, size, op, name) \ > > > + typedef type v##size##s##type __attribute__ ((vector_size(4*size))= ); \ > > > + v##size##s##type type##foo##size##i_##name (v##size##s##type a, \ > > > + v##size##s##type b) \ > > > + { \ > > > + v##size##s##type a1 =3D __builtin_shufflevector (a, a, \ > > > + VEC_PERM_##size); = \ > > > + v##size##s##type b1 =3D __builtin_shufflevector (b, b, \ > > > + VEC_PERM_##size); = \ > > > + return a1 op b1; \ > > > + } > > > + > > > +#define INT_PERMS(op, name) \ > > > + TYPE_PERM_OP (int, 4, op, name) \ > > > + > > > +#define FP_PERMS(op, name) \ > > > + TYPE_PERM_OP (float, 4, op, name) \ > > > + > > > +INT_PERMS (+, add) > > > +INT_PERMS (-, sub) > > > +INT_PERMS (*, mul) > > > +INT_PERMS (|, ior) > > > +INT_PERMS (^, xor) > > > +INT_PERMS (&, and) > > > +INT_PERMS (<<, shl) > > > +INT_PERMS (>>, shr) > > > +FP_PERMS (+, add) > > > +FP_PERMS (-, sub) > > > +FP_PERMS (*, mul) > > > + > > > -- > > > 2.18.1 > > > --000000000000f198b005ed148436 Content-Type: text/x-patch; charset="US-ASCII"; name="0001-Optimize-VEC_PERM_EXPR-with-same-permutation-index-a.patch" Content-Disposition: attachment; filename="0001-Optimize-VEC_PERM_EXPR-with-same-permutation-index-a.patch" Content-Transfer-Encoding: base64 Content-ID: X-Attachment-Id: f_laag0y6b0 RnJvbSAyZDAwMTRlM2IwZjlmZWRjZDc1ZmUzMWNmZmQ0Zjk5OGRiNmRiNTQzIE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiBIb25neXUgV2FuZyA8aG9uZ3l1LndhbmdAaW50ZWwuY29tPgpE YXRlOiBNb24sIDE3IEphbiAyMDIyIDEzOjAxOjUxICswODAwClN1YmplY3Q6IFtQQVRDSF0gT3B0 aW1pemUgVkVDX1BFUk1fRVhQUiB3aXRoIHNhbWUgcGVybXV0YXRpb24gaW5kZXggYW5kCiBvcGVy YXRpb24KClRoZSBzZXF1ZW5jZQogICAgIGMxID0gVkVDX1BFUk1fRVhQUiAoYSwgYSwgbWFzaykK ICAgICBjMiA9IFZFQ19QRVJNX0VYUFIgKGIsIGIsIG1hc2spCiAgICAgYzMgPSBjMSBvcCBjMgpj YW4gYmUgb3B0aW1pemVkIHRvCiAgICAgYyA9IGEgb3AgYgogICAgIGMzID0gVkVDX1BFUk1fRVhQ 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