From: KuanLin Chen <best124612@gmail.com>
To: Jeff Law <jeffreyalaw@gmail.com>
Cc: gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@gmail.com>
Subject: Re: [RFC][V2] RISC-V: Support -mcmodel=large.
Date: Mon, 18 Dec 2023 15:46:57 +0800 [thread overview]
Message-ID: <CA+jpiRfMX8UC8UHgnNOi=6FumayRgJDPHypGmwdN5RAQCA_BZA@mail.gmail.com> (raw)
In-Reply-To: <36edbf1f-dbbe-4585-83ac-f7fa63f1b204@gmail.com>
[-- Attachment #1.1: Type: text/plain, Size: 751 bytes --]
Hi Jeff,
Sorry for this missing.
I've removed riscv_asm_output_pool_epilogue because the pool beginning is
always aligned from FUNCTION_BOUNDARY.
Please find attached. Thank you.
Jeff Law <jeffreyalaw@gmail.com> 於 2023年12月18日 週一 上午3:15寫道:
>
>
> On 11/10/23 02:10, KuanLin Chen wrote:
> > Sorry. It missed a semicolon in the previos patch. Please find the new
> > one in the attachment. Thanks.
> Thanks. I was going to do some final testing with the plan to integrate
> this patch today, but I think there's a piece missing. Specifically I
> think it's missing a definition for riscv_asm_output_pool_epilogue.
>
> Can you please send an updated patch that includes that function?
>
> Thanks,
> Jeff
>
[-- Attachment #2: 0001-RISC-V-Support-mcmodel-large.patch --]
[-- Type: application/octet-stream, Size: 11706 bytes --]
From d4ddb60c48a80bd67032df97b3dbfe862641b456 Mon Sep 17 00:00:00 2001
From: Kuan-Lin Chen <rufus@andestech.com>
Date: Sun, 18 Feb 2018 20:19:49 +0800
Subject: [PATCH] RISC-V: Support -mcmodel=large.
---
gcc/config/riscv/predicates.md | 23 +++++-
gcc/config/riscv/riscv-c.cc | 4 +
gcc/config/riscv/riscv-opts.h | 1 +
gcc/config/riscv/riscv-protos.h | 1 +
gcc/config/riscv/riscv.cc | 86 +++++++++++++++++++-
gcc/config/riscv/riscv.md | 9 ++
gcc/config/riscv/riscv.opt | 3 +
gcc/testsuite/gcc.target/riscv/large-model.c | 11 +++
8 files changed, 131 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/large-model.c
diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index ff213e5f8a3..8af3027cdaf 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -289,7 +289,8 @@
case SYMBOL_REF:
case LABEL_REF:
return riscv_symbolic_constant_p (op, &symbol_type)
- && !riscv_split_symbol_type (symbol_type);
+ && !riscv_split_symbol_type (symbol_type)
+ && symbol_type != SYMBOL_FORCE_TO_MEM;
case HIGH:
op = XEXP (op, 0);
@@ -326,9 +327,15 @@
})
(define_predicate "call_insn_operand"
- (ior (match_operand 0 "absolute_symbolic_operand")
- (match_operand 0 "plt_symbolic_operand")
- (match_operand 0 "register_operand")))
+ (match_operand 0 "general_operand")
+{
+ if (riscv_cmodel == CM_LARGE)
+ return register_operand (op, mode);
+ else
+ return (absolute_symbolic_operand (op, mode)
+ || plt_symbolic_operand (op, mode)
+ || register_operand (op, mode));
+})
(define_predicate "modular_operator"
(match_code "plus,minus,mult,ashift"))
@@ -611,3 +618,11 @@
(and (match_code "const_int")
(ior (match_operand 0 "not_uimm_extra_bit_operand")
(match_operand 0 "const_nottwobits_not_arith_operand"))))
+
+(define_predicate "pcrel_symbol_operand"
+ (match_code "symbol_ref")
+{
+ enum riscv_symbol_type type;
+ return (riscv_symbolic_constant_p (op, &type)
+ && type == SYMBOL_PCREL);
+})
diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
index dd1bd0596fc..08fe56cce59 100644
--- a/gcc/config/riscv/riscv-c.cc
+++ b/gcc/config/riscv/riscv-c.cc
@@ -101,6 +101,10 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile)
builtin_define ("__riscv_cmodel_medlow");
break;
+ case CM_LARGE:
+ builtin_define ("__riscv_cmodel_large");
+ break;
+
case CM_PIC:
case CM_MEDANY:
builtin_define ("__riscv_cmodel_medany");
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 0b242f068e1..0db9b363a43 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -35,6 +35,7 @@ extern enum riscv_abi_type riscv_abi;
enum riscv_code_model {
CM_MEDLOW,
CM_MEDANY,
+ CM_LARGE,
CM_PIC
};
extern enum riscv_code_model riscv_cmodel;
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 52097fe48cf..5d3f83685e6 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -28,6 +28,7 @@ along with GCC; see the file COPYING3. If not see
the unspec enum in riscv.md, subsequent to UNSPEC_ADDRESS_FIRST. */
enum riscv_symbol_type {
SYMBOL_ABSOLUTE,
+ SYMBOL_FORCE_TO_MEM,
SYMBOL_PCREL,
SYMBOL_GOT_DISP,
SYMBOL_TLS,
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index d0efb939bf2..acbe4424a4f 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -295,6 +295,9 @@ bool riscv_user_wants_strict_align;
/* Stack alignment to assume/maintain. */
unsigned riscv_stack_boundary;
+/* Whether in riscv_output_mi_thunk. */
+static bool riscv_in_thunk_func = false;
+
/* If non-zero, this is an offset to be added to SP to redefine the CFA
when restoring the FP register from the stack. Only valid when generating
the epilogue. */
@@ -832,7 +835,17 @@ riscv_classify_symbol (const_rtx x)
if (GET_CODE (x) == SYMBOL_REF && flag_pic && !riscv_symbol_binds_local_p (x))
return SYMBOL_GOT_DISP;
- return riscv_cmodel == CM_MEDLOW ? SYMBOL_ABSOLUTE : SYMBOL_PCREL;
+ switch (riscv_cmodel)
+ {
+ case CM_MEDLOW:
+ return SYMBOL_ABSOLUTE;
+ case CM_LARGE:
+ if (SYMBOL_REF_P (x))
+ return CONSTANT_POOL_ADDRESS_P (x) ? SYMBOL_PCREL : SYMBOL_FORCE_TO_MEM;
+ return SYMBOL_PCREL;
+ default:
+ return SYMBOL_PCREL;
+ }
}
/* Classify the base of symbolic expression X. */
@@ -896,6 +909,7 @@ static int riscv_symbol_insns (enum riscv_symbol_type type)
case SYMBOL_PCREL: return 2; /* AUIPC + the reference. */
case SYMBOL_TLS_LE: return 3; /* LUI + ADD TP + the reference. */
case SYMBOL_GOT_DISP: return 3; /* AUIPC + LD GOT + the reference. */
+ case SYMBOL_FORCE_TO_MEM: return 3; /* AUIPC + LD + the reference. */
default: gcc_unreachable ();
}
}
@@ -1065,6 +1079,9 @@ riscv_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
split_const (x, &base, &offset);
if (riscv_symbolic_constant_p (base, &type))
{
+ if (type == SYMBOL_FORCE_TO_MEM)
+ return false;
+
/* As an optimization, don't spill symbolic constants that are as
cheap to rematerialize as to access in the constant pool. */
if (SMALL_OPERAND (INTVAL (offset)) && riscv_symbol_insns (type) > 0)
@@ -1892,6 +1909,9 @@ riscv_split_symbol (rtx temp, rtx addr, machine_mode mode, rtx *low_out)
if (low_out)
switch (symbol_type)
{
+ case SYMBOL_FORCE_TO_MEM:
+ return false;
+
case SYMBOL_ABSOLUTE:
{
rtx high = gen_rtx_HIGH (Pmode, copy_rtx (addr));
@@ -2049,7 +2069,20 @@ static rtx
riscv_force_address (rtx x, machine_mode mode)
{
if (!riscv_legitimate_address_p (mode, x, false))
- x = force_reg (Pmode, x);
+ {
+ if (can_create_pseudo_p ())
+ return force_reg (Pmode, x);
+ else
+ {
+ /* It's only safe for the thunk function.
+ Use ra as the temp regiater. */
+ gcc_assert (riscv_in_thunk_func);
+ rtx reg = RISCV_PROLOGUE_TEMP2 (Pmode);
+ riscv_emit_move (reg, x);
+ return reg;
+ }
+ }
+
return x;
}
@@ -5868,6 +5901,12 @@ riscv_size_ok_for_small_data_p (int size)
static bool
riscv_in_small_data_p (const_tree x)
{
+ /* Because default_use_anchors_for_symbol_p doesn't gather small data to use
+ the anchor symbol to address nearby objects. In large model, it can get
+ the better result using the anchor optiomization. */
+ if (riscv_cmodel == CM_LARGE)
+ return false;
+
if (TREE_CODE (x) == STRING_CST || TREE_CODE (x) == FUNCTION_DECL)
return false;
@@ -5933,12 +5972,32 @@ riscv_unique_section (tree decl, int reloc)
default_unique_section (decl, reloc);
}
+/* Constant pools are per-function when in large code model. */
+
+static inline bool
+riscv_can_use_per_function_literal_pools_p (void)
+{
+ return riscv_cmodel == CM_LARGE;
+}
+
+static bool
+riscv_use_blocks_for_constant_p (machine_mode, const_rtx)
+{
+ /* We can't use blocks for constants when we're using a per-function
+ constant pool. */
+ return !riscv_can_use_per_function_literal_pools_p ();
+}
+
/* Return a section for X, handling small data. */
static section *
riscv_elf_select_rtx_section (machine_mode mode, rtx x,
unsigned HOST_WIDE_INT align)
{
+ /* The literal pool stays with the function. */
+ if (riscv_can_use_per_function_literal_pools_p ())
+ return function_section (current_function_decl);
+
section *s = default_elf_select_rtx_section (mode, x, align);
if (riscv_size_ok_for_small_data_p (GET_MODE_SIZE (mode).to_constant ()))
@@ -8442,6 +8501,8 @@ riscv_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
rtx this_rtx, temp1, temp2, fnaddr;
rtx_insn *insn;
+ riscv_in_thunk_func = true;
+
/* Pretend to be a post-reload pass while generating rtl. */
reload_completed = 1;
@@ -8508,6 +8569,7 @@ riscv_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
/* Clean up the vars set above. Note that final_end_function resets
the global pointer for us. */
reload_completed = 0;
+ riscv_in_thunk_func = false;
}
/* Allocate a chunk of memory for per-function machine-dependent data. */
@@ -8650,6 +8712,18 @@ riscv_option_override (void)
if (flag_pic)
g_switch_value = 0;
+ /* Always prefer medlow than medany for RV32 since medlow can access
+ full address space. */
+ if (riscv_cmodel == CM_LARGE && !TARGET_64BIT)
+ riscv_cmodel = CM_MEDLOW;
+
+ if (riscv_cmodel == CM_LARGE && TARGET_EXPLICIT_RELOCS)
+ sorry ("code model %qs with %qs", "large", "-mexplicit-relocs");
+
+ if (riscv_cmodel == CM_LARGE && flag_pic)
+ sorry ("code model %qs with %qs", "large",
+ global_options.x_flag_pic > 1 ? "-fPIC" : "-fpic");
+
if (flag_pic)
riscv_cmodel = CM_PIC;
@@ -9017,6 +9091,12 @@ riscv_function_ok_for_sibcall (tree decl ATTRIBUTE_UNUSED,
if (cfun->machine->interrupt_handler_p)
return false;
+ /* Don't use sibcalls in the large model, because a sibcall instruction
+ expanding and a epilogue expanding both use RISCV_PROLOGUE_TEMP
+ register. */
+ if (riscv_cmodel == CM_LARGE)
+ return false;
+
return true;
}
@@ -10411,7 +10491,7 @@ extract_base_offset_in_addr (rtx mem, rtx *base, rtx *offset)
#define TARGET_LEGITIMATE_CONSTANT_P riscv_legitimate_constant_p
#undef TARGET_USE_BLOCKS_FOR_CONSTANT_P
-#define TARGET_USE_BLOCKS_FOR_CONSTANT_P hook_bool_mode_const_rtx_true
+#define TARGET_USE_BLOCKS_FOR_CONSTANT_P riscv_use_blocks_for_constant_p
#undef TARGET_LEGITIMATE_ADDRESS_P
#define TARGET_LEGITIMATE_ADDRESS_P riscv_legitimate_address_p
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 935eeb7fd8e..c9a3c7ae078 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -41,6 +41,7 @@
;; Symbolic accesses. The order of this list must match that of
;; enum riscv_symbol_type in riscv-protos.h.
UNSPEC_ADDRESS_FIRST
+ UNSPEC_FORCE_FOR_MEM
UNSPEC_PCREL
UNSPEC_LOAD_GOT
UNSPEC_TLS
@@ -3735,6 +3736,14 @@
FAIL;
})
+(define_insn "*large_load_address"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (mem:DI (match_operand 1 "pcrel_symbol_operand" "")))]
+ "TARGET_64BIT && riscv_cmodel == CM_LARGE"
+ "ld\t%0,%1"
+ [(set_attr "type" "load")
+ (set (attr "length") (const_int 8))])
+
(include "bitmanip.md")
(include "crypto.md")
(include "sync.md")
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 11526f9cc2a..85b5408bf32 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -123,6 +123,9 @@ Enum(code_model) String(medlow) Value(CM_MEDLOW)
EnumValue
Enum(code_model) String(medany) Value(CM_MEDANY)
+EnumValue
+Enum(code_model) String(large) Value(CM_LARGE)
+
mexplicit-relocs
Target Mask(EXPLICIT_RELOCS)
Use %reloc() operators, rather than assembly macros, to load addresses.
diff --git a/gcc/testsuite/gcc.target/riscv/large-model.c b/gcc/testsuite/gcc.target/riscv/large-model.c
new file mode 100644
index 00000000000..244d14e1878
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/large-model.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64 -fno-section-anchors -mcmodel=large" } */
+/* { dg-skip-if "" { *-*-* } {"-O0"} } */
+int a, b;
+int foo1()
+{
+ return a*b;
+}
+
+/* { dg-final { scan-assembler-times "ld.*LC0" 1 } } */
+/* { dg-final { scan-assembler-times "ld.*LC1" 1 } } */
--
2.30.1
next prev parent reply other threads:[~2023-12-18 7:47 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-10 9:00 KuanLin Chen
2023-11-10 9:10 ` KuanLin Chen
2023-12-17 19:15 ` Jeff Law
2023-12-18 7:46 ` KuanLin Chen [this message]
2023-12-20 17:55 ` Jeff Law
2023-12-20 18:05 ` Palmer Dabbelt
2023-12-20 18:12 ` Jeff Law
2023-12-20 18:21 ` Palmer Dabbelt
2023-12-20 18:25 ` Jeff Law
2023-12-20 18:41 ` Palmer Dabbelt
2023-12-20 21:13 ` Patrick O'Neill
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