From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by sourceware.org (Postfix) with ESMTPS id 22DAF3858D33 for ; Mon, 29 Apr 2024 07:47:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 22DAF3858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 22DAF3858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::529 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714376841; cv=none; b=ngALstTD7uTe9Km8JyCDKxCwop5fitZ28ojSo5/7Hwn+UilgQxmmf/tbO/C1YU7xMgtT6zPfnNW0VNl1MyTZDgLxXf5HVceiOPeQy74/fK9wAFXVTnSwx5vOTnzmQbarpZBsj49M9JUwxmt/2Gxa5ES28uh5KiOCQjryTUfLmF0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714376841; c=relaxed/simple; bh=oIKqKkJmQAacNENIG7ZCKUMJ4tP8ySe6w/HZdck6cGw=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=EmcwYHPXMpt01KrMXJjI1tT1n1yGmSY+ZNtn84SchcDRKfCd9VvSNh4TX4JBeDLh3HjUbZk/Mwj3iZrGNPBvuXw3tiwo7Icgn6CSGMBxcistGSZQq3plASQ/waUfbmmSwd7uG6anlXmGrXXQQ5kyVhiUq8vBtuYUcBJsrMDBvg0= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-56e69888a36so4243001a12.3 for ; Mon, 29 Apr 2024 00:47:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1714376838; x=1714981638; darn=gcc.gnu.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=o3Las8N1JPnLiRyP/uq4b3pi3KlTVVioGQGO9fRjHsg=; b=FycUiqRiVPy8tOhynV9Jwc0gXb6HGeouVAq/EhuNyOOydwRAxo/0xtMO/WR8/zpzfP dlUPxhbPMCq8ZZQqKeTWbwiGRcFjh0N81OGixdbs9T0dd6Hduhhac4FfzQUizuIQc1jB D3kxKgRB0gcjMMSrMq1a1ydQB2h+iZ0MTpRrL+cPy0Vy26gWPutCx7Il0e9kw/+Mbdoo J7NggwtFXfDvrsWxmzShrbn4sBsjw32+rfAafsWXeiOSR13Lx3Cn3bCA1A1uvA6RrqDp RbCNMdiv5engpGWZDb35TLKmksJx5/tIkMedn8XhebMgWR831UI7GDFTWjDWoVHV8fN2 3Byg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714376838; x=1714981638; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=o3Las8N1JPnLiRyP/uq4b3pi3KlTVVioGQGO9fRjHsg=; b=PlcHF7tii74dQWKt5EcjR5INZkB94Bj/4JY/xq+AX6TjYZBFAn7gJtXXlq4b3aNoir qPYH1cgZvOlGPnA1JldLlCXIoPsTyhcAgXolb6ilReHIjINx/9b800W7nCFcAl0BY8QY U51v5KIFh6ZPRZ6cQK9Z0X/wA9pJn6Q1SjKTLt3sAaF4xz/49jrzfMLlCF6tXdVRSEGL LByeCShr5pWo6t2UMmRQ4neWr23ddrEKUs8m2jkJQ6ix6WYO5LJ7YHjdWOmUDuwgXhQM D8aqPUVrufmL8amnMdvzA21ROeTJ/jrxozDzTpO+Cv5Pb4ZFO8uMq+1Ig87n25zS70GO vmXA== X-Gm-Message-State: AOJu0YwJKEojWw7rTLjPqdSOFq7+WtxU/GohjwsciA63y57yzvMbF1F4 ZtTiLTNMLYZw7nFyb2Aw4k4VLvv99ruqRGppM73SM884xGHxKfgGpZ8HQYRj01JfUKr+pq2IagI BIY9vp4MPitlX+Iy8PbdmmzHoY6M= X-Google-Smtp-Source: AGHT+IG24489PbpoOwl/IEV0jKAXPBR3ZOZyS+zRPCRt7HEUEUQ8k9a3Z4q+312HcdWRlc54mtBDZA/4lLH8DQYi1OM= X-Received: by 2002:a05:6402:268c:b0:572:69be:9b00 with SMTP id w12-20020a056402268c00b0057269be9b00mr4061705edd.16.1714376837565; Mon, 29 Apr 2024 00:47:17 -0700 (PDT) MIME-Version: 1.0 References: <20240428035321.283941-1-pan2.li@intel.com> <20240429074014.1576154-1-pan2.li@intel.com> In-Reply-To: <20240429074014.1576154-1-pan2.li@intel.com> From: Kito Cheng Date: Mon, 29 Apr 2024 15:47:05 +0800 Message-ID: Subject: Re: [PATCH v2] RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885] To: pan2.li@intel.com, Jakub Jelinek , Jeff Law Cc: gcc-patches@gcc.gnu.org, juzhe.zhong@rivai.ai Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi Pan: LGTM. Hi Jakub: Is this OK for GCC 14 branch? it's fix ICE on valid code, thanks :) On Mon, Apr 29, 2024 at 3:40=E2=80=AFPM wrote: > > From: Pan Li > > When we build with isl, there will be a ICE for graphite in both > the c/c++ and fortran. The legitimize move cannot take care of > below rtl. > > (set (subreg:DI (reg:TI 237) 8) (subreg:DI (const_poly_int:TI [4, 2]) 8)) > > Then we will have ice similar to below: > > internal compiler error: in extract_insn, at recog.cc:2812. > > This patch would like to take care of the above rtl. Given the value of > const_poly_int can hardly excceed the max of int64, we can simply > consider the highest 8 bytes of TImode is zero and then set the dest > to (const_int 0). > > The below test cases are fixed by this PATCH. > > C: > FAIL: gcc.dg/graphite/pr111878.c (internal compiler error: in > extract_insn, at recog.cc:2812) > FAIL: gcc.dg/graphite/pr111878.c (test for excess errors) > > Fortran: > FAIL: gfortran.dg/graphite/vect-pr40979.f90 -O (internal compiler > error: in extract_insn, at recog.cc:2812) > FAIL: gfortran.dg/graphite/pr29832.f90 -O3 -fomit-frame-pointer > -funroll-loops -fpeel-loops -ftracer -finline-functions (internal > compiler error: in extract_insn, at recog.cc:2812) > FAIL: gfortran.dg/graphite/pr29581.f90 -O3 -g (test for excess > errors) > FAIL: gfortran.dg/graphite/pr14741.f90 -O (test for excess errors) > FAIL: gfortran.dg/graphite/pr29581.f90 -O3 -fomit-frame-pointer > -funroll-loops -fpeel-loops -ftracer -finline-functions (test for > excess errors) > FAIL: gfortran.dg/graphite/vect-pr40979.f90 -O (test for excess > errors) > FAIL: gfortran.dg/graphite/id-27.f90 -O (internal compiler error: in > extract_insn, at recog.cc:2812) > FAIL: gfortran.dg/graphite/pr29832.f90 -O3 -g (internal compiler > error: in extract_insn, at recog.cc:2812) > FAIL: gfortran.dg/graphite/pr29832.f90 -O3 -g (test for excess > errors) > FAIL: gfortran.dg/graphite/id-27.f90 -O (test for excess errors) > FAIL: gfortran.dg/graphite/pr29832.f90 -O3 -fomit-frame-pointer > -funroll-loops -fpeel-loops -ftracer -finline-functions (test for > excess errors) > FAIL: gfortran.dg/graphite/pr29581.f90 -O3 -fomit-frame-pointer > -funroll-loops -fpeel-loops -ftracer -finline-functions (internal > compiler error: in extract_insn, at recog.cc:2812) > FAIL: gfortran.dg/graphite/pr14741.f90 -O (internal compiler error: > in extract_insn, at recog.cc:2812) > FAIL: gfortran.dg/graphite/pr29581.f90 -O3 -g (internal compiler > error: in extract_insn, at recog.cc:2812) > > The below test suites are passed for this patch: > * The rv64gcv fully regression test. > * The rv64gc fully regression test. > > Try to write some RTL code for test but not works well according to > existing test cases. Thus, take above as test cases. Please note > graphite require the gcc build with isl. > > PR target/114885 > > gcc/ChangeLog: > > * config/riscv/riscv.cc (riscv_legitimize_subreg_const_poly_move)= : New > func impl to take care of (const_int_poly:TI 8). > (riscv_legitimize_move): Handle subreg is const_int_poly, > > Signed-off-by: Pan Li > --- > gcc/config/riscv/riscv.cc | 44 +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 44 insertions(+) > > diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc > index 0519e0679ed..0f62b295b96 100644 > --- a/gcc/config/riscv/riscv.cc > +++ b/gcc/config/riscv/riscv.cc > @@ -2786,6 +2786,45 @@ riscv_v_adjust_scalable_frame (rtx target, poly_in= t64 offset, bool epilogue) > REG_NOTES (insn) =3D dwarf; > } > > +/* Take care below subreg const_poly_int move: > + > + 1. (set (subreg:DI (reg:TI 237) 8) > + (subreg:DI (const_poly_int:TI [4, 2]) 8)) > + =3D> > + (set (subreg:DI (reg:TI 237) 8) > + (const_int 0)) */ > + > +static bool > +riscv_legitimize_subreg_const_poly_move (machine_mode mode, rtx dest, rt= x src) > +{ > + gcc_assert (SUBREG_P (src) && CONST_POLY_INT_P (SUBREG_REG (src))); > + gcc_assert (SUBREG_BYTE (src).is_constant ()); > + > + int byte_offset =3D SUBREG_BYTE (src).to_constant (); > + rtx const_poly =3D SUBREG_REG (src); > + machine_mode subreg_mode =3D GET_MODE (const_poly); > + > + if (subreg_mode !=3D TImode) /* Only TImode is needed for now. */ > + return false; > + > + if (byte_offset =3D=3D 8) > + { > + /* The const_poly_int cannot exceed int64, just set zero here. */ > + emit_move_insn (dest, CONST0_RTX (mode)); > + return true; > + } > + > + /* The below transform will be covered in somewhere else. > + Thus, ignore this here. > + (set (subreg:DI (reg:TI 237) 0) > + (subreg:DI (const_poly_int:TI [4, 2]) 0)) > + =3D> > + (set (subreg:DI (reg:TI 237) 0) > + (const_poly_int:DI [4, 2])) */ > + > + return false; > +} > + > /* If (set DEST SRC) is not a valid move instruction, emit an equivalent > sequence that is valid. */ > > @@ -2839,6 +2878,11 @@ riscv_legitimize_move (machine_mode mode, rtx dest= , rtx src) > } > return true; > } > + > + if (SUBREG_P (src) && CONST_POLY_INT_P (SUBREG_REG (src)) > + && riscv_legitimize_subreg_const_poly_move (mode, dest, src)) > + return true; > + > /* Expand > (set (reg:DI target) (subreg:DI (reg:V8QI reg) 0)) > Expand this data movement instead of simply forbid it since > -- > 2.34.1 >