From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vs1-xe2b.google.com (mail-vs1-xe2b.google.com [IPv6:2607:f8b0:4864:20::e2b]) by sourceware.org (Postfix) with ESMTPS id 20CC9385840F for ; Fri, 24 Feb 2023 09:54:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 20CC9385840F Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-vs1-xe2b.google.com with SMTP id m10so18745837vso.4 for ; Fri, 24 Feb 2023 01:54:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=g+R4OC3Bb7613FbKQXSpFR/nOBIHqiVZZOfZVNbkvMM=; b=g1P5X+ShAuOf109RsJ5HNdFP4V0uB6nWnf+YfxPArZ2V8yRK8w1QUmvzzp62NtySg/ gW6ZEgcWuKforebfl9EWvi9afmKeqc0dx1u8dAtw8//KoFoWEIIAbNYgvmfc4fabCKvE O+pMZTQcJpK3TscjXaxSreHZqRt/EZMtOTxl3/5FfOEJyStvQsbLZ8pZTNbq82oCrvsJ YVnczweySqSTLJTLI3pbTGfHhAl4QqF4EdtXNNUl8NqnovDr8pehWsGFVoULQ9Vv+SpZ UaZIcSqzAbsPROZ/pBVpF5R19/NJ0nuUeG9MSW38haCuLHJ1SYNV3x8L1WV2syEY3YL4 Ujpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g+R4OC3Bb7613FbKQXSpFR/nOBIHqiVZZOfZVNbkvMM=; b=V4505a+HDr0n2WCDip45v1jAzUjoQHVZj6ImQZaZcWVXfRjVuHXgHNNkb0m3pWs0CT rids7XOOKlHosw5jg+p+v7ouAPTENNAbSGvHDgzIOsnykg/X+6vKSlu56jxgQwH44JhJ YoOKh/MIklSXtpAqw0fS+naM/odbjvbZNbidOAp/vks2gcwN38naS7uiSsIMQzJJ6gKI C3ZH0kN9a3stNcdUs4li1BECzpcj5YCpwQez3qYDdFIIJAVEtcTnu7/AyjEP/kjkzMzi 0/PN4CBAgNvBq+paF8ii7lF8y4oajJmzpPY1kUBSS+XK7C4iUSzL4tDGKTeMGMwrtYts jNug== X-Gm-Message-State: AO0yUKXGmgHAaeJBiG7lV9dck6CRw5oR4P2GXaj8SYVFsA17d/TG5v86 2OQt/FcjCK6yCv64wUCu9Q557tH668Wi86pFCtw= X-Google-Smtp-Source: AK7set/AcX9L1OhvMS8qArlAUdZHlQIhJdyIrNilwkybG1oVLkqh43Chy8UoIDX0IXyeWq3KzD6DeTMwR3czLnVMMZE= X-Received: by 2002:a67:ea92:0:b0:411:b4c2:c6c0 with SMTP id f18-20020a67ea92000000b00411b4c2c6c0mr2061089vso.0.1677232470183; Fri, 24 Feb 2023 01:54:30 -0800 (PST) MIME-Version: 1.0 References: <20230224055127.2500953-1-christoph.muellner@vrull.eu> <20230224055127.2500953-4-christoph.muellner@vrull.eu> In-Reply-To: From: Kito Cheng Date: Fri, 24 Feb 2023 17:54:18 +0800 Message-ID: Subject: Re: [PATCH v3 03/11] riscv: thead: Add support for the XTheadBa ISA extension To: Andrew Pinski Cc: Christoph Muellner , gcc-patches@gcc.gnu.org, Kito Cheng , Jim Wilson , Palmer Dabbelt , Andrew Waterman , Philipp Tomsich , Jeff Law , Cooper Qu , Lifang Xia , Yunhai Shang , Zhiwei Liu Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: My impression is that md patterns will use first-match patterns? so the zba will get higher priority than xtheadba if both patterns are matched? On Fri, Feb 24, 2023 at 2:52 PM Andrew Pinski via Gcc-patches wrote: > > On Thu, Feb 23, 2023 at 9:55 PM Christoph Muellner > wrote: > > > > From: Christoph M=C3=BCllner > > > > This patch adds support for the XTheadBa ISA extension. > > The new INSN pattern is defined in a new file to separate > > this vendor extension from the standard extensions. > > How does this interact with doing -march=3Drv32gc_xtheadba_zba ? > Seems like it might be better handle that case correctly. I suspect > these all XThreadB* extensions have a similar problem too. > > Thanks, > Andrew Pinski > > > > > gcc/ChangeLog: > > > > * config/riscv/riscv.md: Include thead.md > > * config/riscv/thead.md: New file. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/riscv/xtheadba-addsl.c: New test. > > > > Changes in v3: > > - Fix operand order for th.addsl. > > > > Signed-off-by: Christoph M=C3=BCllner > > --- > > gcc/config/riscv/riscv.md | 1 + > > gcc/config/riscv/thead.md | 31 +++++++++++ > > .../gcc.target/riscv/xtheadba-addsl.c | 55 +++++++++++++++++++ > > 3 files changed, 87 insertions(+) > > create mode 100644 gcc/config/riscv/thead.md > > create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadba-addsl.c > > > > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md > > index 05924e9bbf1..d6c2265e9d4 100644 > > --- a/gcc/config/riscv/riscv.md > > +++ b/gcc/config/riscv/riscv.md > > @@ -3093,4 +3093,5 @@ (define_insn "riscv_prefetchi_" > > (include "pic.md") > > (include "generic.md") > > (include "sifive-7.md") > > +(include "thead.md") > > (include "vector.md") > > diff --git a/gcc/config/riscv/thead.md b/gcc/config/riscv/thead.md > > new file mode 100644 > > index 00000000000..158e9124c3a > > --- /dev/null > > +++ b/gcc/config/riscv/thead.md > > @@ -0,0 +1,31 @@ > > +;; Machine description for T-Head vendor extensions > > +;; Copyright (C) 2021-2022 Free Software Foundation, Inc. > > + > > +;; This file is part of GCC. > > + > > +;; GCC is free software; you can redistribute it and/or modify > > +;; it under the terms of the GNU General Public License as published b= y > > +;; the Free Software Foundation; either version 3, or (at your option) > > +;; any later version. > > + > > +;; GCC is distributed in the hope that it will be useful, > > +;; but WITHOUT ANY WARRANTY; without even the implied warranty of > > +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > +;; GNU General Public License for more details. > > + > > +;; You should have received a copy of the GNU General Public License > > +;; along with GCC; see the file COPYING3. If not see > > +;; . > > + > > +;; XTheadBa > > + > > +(define_insn "*th_addsl" > > + [(set (match_operand:X 0 "register_operand" "=3Dr") > > + (plus:X (ashift:X (match_operand:X 1 "register_operand" "r") > > + (match_operand:QI 2 "immediate_operand" "I")) > > + (match_operand:X 3 "register_operand" "r")))] > > + "TARGET_XTHEADBA > > + && (INTVAL (operands[2]) >=3D 0) && (INTVAL (operands[2]) <=3D 3)" > > + "th.addsl\t%0,%3,%1,%2" > > + [(set_attr "type" "bitmanip") > > + (set_attr "mode" "")]) > > diff --git a/gcc/testsuite/gcc.target/riscv/xtheadba-addsl.c b/gcc/test= suite/gcc.target/riscv/xtheadba-addsl.c > > new file mode 100644 > > index 00000000000..5004735a246 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/riscv/xtheadba-addsl.c > > @@ -0,0 +1,55 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-march=3Drv32gc_xtheadba" { target { rv32 } } } */ > > +/* { dg-options "-march=3Drv64gc_xtheadba" { target { rv64 } } } */ > > +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ > > + > > +long > > +test_1 (long a, long b) > > +{ > > + /* th.addsl aX, aX, 1 */ > > + return a + (b << 1); > > +} > > + > > +int > > +foos (short *x, int n) > > +{ > > + /* th.addsl aX, aX, 1 */ > > + return x[n]; > > +} > > + > > +long > > +test_2 (long a, long b) > > +{ > > + /* th.addsl aX, aX, 2 */ > > + return a + (b << 2); > > +} > > + > > +int > > +fooi (int *x, int n) > > +{ > > + /* th.addsl aX, aX, 2 */ > > + return x[n]; > > +} > > + > > +long > > +test_3 (long a, long b) > > +{ > > + /* th.addsl aX, aX, 3 */ > > + return a + (b << 3); > > +} > > + > > +long > > +fool (long *x, int n) > > +{ > > + /* th.addsl aX, aX, 2 (rv32) */ > > + /* th.addsl aX, aX, 3 (rv64) */ > > + return x[n]; > > +} > > + > > +/* { dg-final { scan-assembler-times "th.addsl\[ \t\]*a\[0-9\]+,a\[0-9= \]+,a\[0-9\]+,1" 2 } } */ > > + > > +/* { dg-final { scan-assembler-times "th.addsl\[ \t\]*a\[0-9\]+,a\[0-9= \]+,a\[0-9\]+,2" 3 { target { rv32 } } } } */ > > +/* { dg-final { scan-assembler-times "th.addsl\[ \t\]*a\[0-9\]+,a\[0-9= \]+,a\[0-9\]+,2" 2 { target { rv64 } } } } */ > > + > > +/* { dg-final { scan-assembler-times "th.addsl\[ \t\]*a\[0-9\]+,a\[0-9= \]+,a\[0-9\]+,3" 1 { target { rv32 } } } } */ > > +/* { dg-final { scan-assembler-times "th.addsl\[ \t\]*a\[0-9\]+,a\[0-9= \]+,a\[0-9\]+,3" 2 { target { rv64 } } } } */ > > -- > > 2.39.2 > >