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References: <20230310124053.164-1-jinma@linux.alibaba.com> <f18bfa1e-7d32-e49b-aa86-6d365078264b@gmail.com>
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From: Kito Cheng <kito.cheng@gmail.com>
Date: Wed, 3 May 2023 18:30:46 +0800
Message-ID: <CA+yXCZALFCh0av+46Y6Mg4151qgGVHnOGjhcGCvp8xYas19YZA@mail.gmail.com>
Subject: Re: [PATCH v6] RISC-V: Add support for experimental zfa extension.
To: Jeff Law <jeffreyalaw@gmail.com>
Cc: Jin Ma <jinma@linux.alibaba.com>, gcc-patches@gcc.gnu.org, kito.cheng@sifive.com, 
	palmer@dabbelt.com
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List-Id: <gcc-patches.gcc.gnu.org>

FYI:

This PR described the syntax of fli instruction, which is implemented
in LLVM, and the latest binutils patch (IIRC :P):

https://github.com/riscv-non-isa/riscv-asm-manual/pull/85