From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by sourceware.org (Postfix) with ESMTPS id 672713857001 for ; Wed, 27 Jul 2022 10:41:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 672713857001 Received: by mail-ej1-x62f.google.com with SMTP id ss3so30636848ejc.11 for ; Wed, 27 Jul 2022 03:41:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc; bh=/abNp6syQPaRmEYZsOHQWOWLH/D1JeEp4Mv87nMBFAI=; b=nqkppQr3T4VPK42rehAe6zDoC9ud/7dGALlu3DE7zrqySZRBsEgaiUK+6+bt0VPLHI vyvqbgIKJHJt2Es7k7/+9SOVIGeW4+IMSJwEP45tfSpYGtb1QoCgVoMldOnqlc1b/MHu ekXdWhbTmK4hx5wcGwDPPKCrLcrFQDsc3gwJEsPz8JlBUDBSotnK7ebw20bAJ0Ls4pTL BuaMEK0Ngck0o7mLIxcRmwPhMBMFGtACFeHRuZvsweRMTaTRTmcatUjXvAQ7/O4PF5LR P1zkr/5IKEvdEhz0d6IoJBquJfcqtw3h5Z9XR0p67DH7jkvF+9DoQ65uVTGFckhA1Nts /XJQ== X-Gm-Message-State: AJIora/A1L+7XpdqDV0sufgRDkDaDI3gCUH01Dnt1+r30AvUS0BEjQLK /tw3rguuhCjs4P4hH6J1ENMubOBhIVL7/n5gGyg= X-Google-Smtp-Source: AGRyM1ugK4LDFaWGdKEy2cdZWhkn9Gs5b+tSfZ08suyv/gdFANsAt5ZGObicol+XX15Lom27zBxRluIjFOB+gyr/ZUs= X-Received: by 2002:a17:906:5d16:b0:72f:248d:525a with SMTP id g22-20020a1709065d1600b0072f248d525amr17906643ejt.441.1658918458751; Wed, 27 Jul 2022 03:40:58 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Kito Cheng Date: Wed, 27 Jul 2022 18:40:48 +0800 Message-ID: Subject: Re: [PING][PATCH v2] RISC-V: Split unordered FP comparisons into individual RTL insns To: "Maciej W. Rozycki" Cc: GCC Patches , Andrew Waterman Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Jul 2022 10:41:02 -0000 Hi Maciej: I am convinced that is OK for now, I agree modeling fflags would be a rabbit hole, I tried to build a full GNU toolchain with my quick patch and saw many ICE during build libraries, that definitely should be a long-term optimization project. Although I'm thinking if we should default -fno-trapping-math for RISC-V, because RISC-V didn't trap for any floating point operations, however I think that would be another topic. so you got my LGTM :) On Mon, Jul 18, 2022 at 11:43 PM Maciej W. Rozycki wrote: > > On Mon, 4 Jul 2022, Maciej W. Rozycki wrote: > > > These instructions are only produced via an expander already, so change > > the expander to emit individual RTL insns for each machine instruction > > in the ultimate ultimate sequence produced rather than deferring to a > > single RTL insn producing the whole sequence at once. > > Ping for: > > > > Maciej