From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by sourceware.org (Postfix) with ESMTPS id B55133858034 for ; Wed, 12 Oct 2022 13:02:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B55133858034 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ej1-x630.google.com with SMTP id bj12so37742389ejb.13 for ; Wed, 12 Oct 2022 06:02:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=OCUinmDYna4pmPPQpcF6V/LlZsox6AIGkYBFIxcCgOg=; b=CZPdEW0U5cyVi2IQqGjNitArxgBTkcG3D6qpTA7DBjBNquJXzcUxfdQAQ+McgcSMT2 9O0U8/mKqo1l8BV7w8l8zvS58zapEh4F+oeCk2tIWKP1MJyItYoHfH2byQh/8PwtzWFf myNVU4vbPlws7gzKRAeh0nlh6Q6LZDHSFTZaLZwWM8fceJr96Z1S38TZUfArsw0EKtJK 3QFNVTkjAugeVDGLcHVAjiHlx5CsF8VyGn59FURgOxyfCQ6xhlFj8+jSWt8TuMVRW3uF sndswTGGi1HI6BCKkMNATbUyZvYpy9TmzPtrzqsVawokm9mctBvuaiH+qbGi/ySqqEbv JgTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=OCUinmDYna4pmPPQpcF6V/LlZsox6AIGkYBFIxcCgOg=; b=jBvkdQRsZBHnThh/a5mZctDZeMMXDl4bfMfB/3Kui0YxDil76n+mNKFGly0nrf1nVZ MbBfplCfXGl5cjCwYKWKyQkSMpB3iBpdRmTZAO241DxAA7ZgEbaOIwtkopKx0evGOsFa 11UAd5UGcJ+Qyc/bcFDxtQZikDGQgmBcZbsBkBaxtCKgFbFMDt9roeZ7vBbfG5Q7arGM Xy9UMLveIbi3EJVhg6q2QfyzpHiz7AK6k5kHBkrQ9jYiGrgm7flvLbPNfiBV6aX5yPrC 9d+EYnLjvLl6ckgLKtQLnp9LNAljo8SWoI34tyJYvAeomaCwJQlY/Gz7BOSuWJZHAwZQ aIzg== X-Gm-Message-State: ACrzQf2EKYc3geJZIlnc2nGZ79qq+b9yDalRvHOq4d+XYl/IzBAQ5a5t IawI59Cuz3xZfMGskZWmmvfQ5I39aD/JshhmG8k= X-Google-Smtp-Source: AMsMyM7WaZxxwjn6tAeiDq7XF/I6WdNlbJE+HdfedMpzNDLhUT3T5ssHfazbg+V9U1XZwXF/9ugRtiS8kJGFkWgKJRQ= X-Received: by 2002:a17:906:ee89:b0:73d:70c5:1a4e with SMTP id wt9-20020a170906ee8900b0073d70c51a4emr22035280ejb.683.1665579737086; Wed, 12 Oct 2022 06:02:17 -0700 (PDT) MIME-Version: 1.0 References: <20221011044820.312228-1-juzhe.zhong@rivai.ai> In-Reply-To: <20221011044820.312228-1-juzhe.zhong@rivai.ai> From: Kito Cheng Date: Wed, 12 Oct 2022 21:02:04 +0800 Message-ID: Subject: Re: [PATCH] RISC-V: Move function place to make it looks better. To: juzhe.zhong@rivai.ai Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Moving class declaration to theriscv-vector-builtins.cc file is not bad idea since the only user is riscv-vector-builtins.cc, but I don't think moving other code for consistent with ARM's code is reasonable, anyway committed with only class declaration movement, NOTE: I've off-list conversion with Ju-Zhe with this. On Tue, Oct 11, 2022 at 12:48 PM wrote: > > From: Ju-Zhe Zhong > > gcc/ChangeLog: > > * config/riscv/riscv-vector-builtins.cc (rvv_switcher::rvv_switcher): Move down like ARM SVE. > (rvv_switcher::~rvv_switcher): Move down like ARM SVE. > (mangle_builtin_type): Move down to make it together with other global function. > (class rvv_switcher): Move from riscv-vector-builtins.h. > * config/riscv/riscv-vector-builtins.h (class rvv_switcher): Move to riscv-vector-builtins.cc. > > --- > gcc/config/riscv/riscv-vector-builtins.cc | 79 ++++++++++++++--------- > gcc/config/riscv/riscv-vector-builtins.h | 19 ------ > 2 files changed, 49 insertions(+), 49 deletions(-) > > diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc > index 7033b1fc176..6fd1bb0fcb2 100644 > --- a/gcc/config/riscv/riscv-vector-builtins.cc > +++ b/gcc/config/riscv/riscv-vector-builtins.cc > @@ -86,23 +86,6 @@ static GTY(()) tree abi_vector_types[NUM_VECTOR_TYPES + 1]; > extern GTY(()) tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1]; > tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1]; > > -rvv_switcher::rvv_switcher () > -{ > - /* Set have_regs_of_mode before targetm.init_builtins (). */ > - memcpy (m_old_have_regs_of_mode, have_regs_of_mode, > - sizeof (have_regs_of_mode)); > - for (int i = 0; i < NUM_MACHINE_MODES; ++i) > - if (riscv_v_ext_enabled_vector_mode_p ((machine_mode) i)) > - have_regs_of_mode[i] = true; > -} > - > -rvv_switcher::~rvv_switcher () > -{ > - /* Recover back have_regs_of_mode. */ > - memcpy (have_regs_of_mode, m_old_have_regs_of_mode, > - sizeof (have_regs_of_mode)); > -} > - > /* Add type attributes to builtin type tree, currently only the mangled name. */ > static void > add_vector_type_attribute (tree type, const char *mangled_name) > @@ -140,19 +123,6 @@ lookup_vector_type_attribute (const_tree type) > return lookup_attribute ("RVV type", TYPE_ATTRIBUTES (type)); > } > > -/* If TYPE is a built-in type defined by the RVV ABI, return the mangled name, > - otherwise return NULL. */ > -const char * > -mangle_builtin_type (const_tree type) > -{ > - if (TYPE_NAME (type) && TREE_CODE (TYPE_NAME (type)) == TYPE_DECL) > - type = TREE_TYPE (TYPE_NAME (type)); > - if (tree attr = lookup_vector_type_attribute (type)) > - if (tree id = TREE_VALUE (chain_index (0, TREE_VALUE (attr)))) > - return IDENTIFIER_POINTER (id); > - return NULL; > -} > - > /* Register the built-in RVV ABI types, such as __rvv_int32m1_t. */ > static void > register_builtin_types () > @@ -231,6 +201,55 @@ register_vector_type (vector_type_index type) > builtin_vector_types[0][type] = vectype; > } > > +/* RAII class for enabling enough RVV features to define the built-in > + types and implement the riscv_vector.h pragma. > + > + Note: According to 'TYPE_MODE' macro implementation, we need set > + have_regs_of_mode[mode] to be true if we want to get the exact mode > + from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in > + targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode > + before targetm.init_builtins () and recover back have_regs_of_mode > + after targetm.init_builtins (). */ > +class rvv_switcher > +{ > +public: > + rvv_switcher (); > + ~rvv_switcher (); > + > +private: > + bool m_old_have_regs_of_mode[MAX_MACHINE_MODE]; > +}; > + > +rvv_switcher::rvv_switcher () > +{ > + /* Set have_regs_of_mode before targetm.init_builtins (). */ > + memcpy (m_old_have_regs_of_mode, have_regs_of_mode, > + sizeof (have_regs_of_mode)); > + for (int i = 0; i < NUM_MACHINE_MODES; ++i) > + if (riscv_v_ext_enabled_vector_mode_p ((machine_mode) i)) > + have_regs_of_mode[i] = true; > +} > + > +rvv_switcher::~rvv_switcher () > +{ > + /* Recover back have_regs_of_mode. */ > + memcpy (have_regs_of_mode, m_old_have_regs_of_mode, > + sizeof (have_regs_of_mode)); > +} > + > +/* If TYPE is a built-in type defined by the RVV ABI, return the mangled name, > + otherwise return NULL. */ > +const char * > +mangle_builtin_type (const_tree type) > +{ > + if (TYPE_NAME (type) && TREE_CODE (TYPE_NAME (type)) == TYPE_DECL) > + type = TREE_TYPE (TYPE_NAME (type)); > + if (tree attr = lookup_vector_type_attribute (type)) > + if (tree id = TREE_VALUE (chain_index (0, TREE_VALUE (attr)))) > + return IDENTIFIER_POINTER (id); > + return NULL; > +} > + > /* Initialize all compiler built-ins related to RVV that should be > defined at start-up. */ > void > diff --git a/gcc/config/riscv/riscv-vector-builtins.h b/gcc/config/riscv/riscv-vector-builtins.h > index ec85e0b1320..5c01a760657 100644 > --- a/gcc/config/riscv/riscv-vector-builtins.h > +++ b/gcc/config/riscv/riscv-vector-builtins.h > @@ -36,25 +36,6 @@ enum vector_type_index > NUM_VECTOR_TYPES > }; > > -/* RAII class for enabling enough RVV features to define the built-in > - types and implement the riscv_vector.h pragma. > - > - Note: According to 'TYPE_MODE' macro implementation, we need set > - have_regs_of_mode[mode] to be true if we want to get the exact mode > - from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in > - targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode > - before targetm.init_builtins () and recover back have_regs_of_mode > - after targetm.init_builtins (). */ > -class rvv_switcher > -{ > -public: > - rvv_switcher (); > - ~rvv_switcher (); > - > -private: > - bool m_old_have_regs_of_mode[MAX_MACHINE_MODE]; > -}; > - > } // end namespace riscv_vector > > #endif > -- > 2.36.1 > >