From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by sourceware.org (Postfix) with ESMTPS id 277213858408 for ; Thu, 11 Nov 2021 16:00:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 277213858408 Received: by mail-ed1-x529.google.com with SMTP id m14so26338399edd.0 for ; Thu, 11 Nov 2021 08:00:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=2ojGWQSDu8z7PkTeBOfp+9nIEL+lWfzscdZOWreKKfY=; b=uHZ/AUms6kMvwmicN7G9ioW7v6ulGMUQOQpQ7U4PsGnUhcVicQZCT01P5NZ+yUM6HO JIgV3LV/ix1fECKZoQco/Nw+7Wd7T4HH+g3PXXM7/bP3j4PmACMRp9QtI5DrrNHCmQZQ L4AssZrW5U+51U6SQqKYb3etwu0AK7v7WkVvwQL3BuwQiBvRQoNTEWMGTouvSgTTPC3N JpGBYm8vS5IPT7AfcmWbGlmXuCjElz8Zezs9SYN8XR6Boh09Q5nv7ZwYutgvWnsT61dF 9a/2pwSIHC2bVfvpYk9Vft5XnMsgoQIsPNfZsVFcumW3OUMJhiERRQmrtSlsPQ0SFh1u Qduw== X-Gm-Message-State: AOAM530pK5D86YAAaGjVUuDr1zpX6sWSk1QBfZpy5DX+G7x5yJIthvGl VZlxRDTVCGws//4wf2NGqTrTbSwRFGM3j0AOwefNM9vyO5Y= X-Google-Smtp-Source: ABdhPJzJmNzD+TW2vvLcHhEfVdEDKU5FF4h1C3+uLRK9IxoO076NChZWS/nrrrY8C1kmd3tioPOxgvhWGkI2wPTMqww= X-Received: by 2002:a17:907:961a:: with SMTP id gb26mr10548647ejc.71.1636646454737; Thu, 11 Nov 2021 08:00:54 -0800 (PST) MIME-Version: 1.0 References: <20211111141020.2738001-1-philipp.tomsich@vrull.eu> <20211111141020.2738001-9-philipp.tomsich@vrull.eu> In-Reply-To: <20211111141020.2738001-9-philipp.tomsich@vrull.eu> From: Kito Cheng Date: Fri, 12 Nov 2021 00:00:44 +0800 Message-ID: Subject: Re: [PATCH v1 8/8] RISC-V: bitmanip: relax minmax to operate on GPR To: Philipp Tomsich Cc: GCC Patches , wilson@tuliptree.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Nov 2021 16:00:58 -0000 Hi Philipp: We can't pretend we have SImode min/max instruction without that semantic. Give this testcase, x86 and rv64gc print out 8589934592 8589934591 = 0, but with this patch and compile with rv64gc_zba_zbb -O3, the output become 8589934592 8589934591 = 8589934592 -------------Testcase--------------- #include long long __attribute__((noinline, noipa)) foo6(long long a, long long b) { int xa = a; int xb = b; return (xa > xb ? xa : xb); } int main() { long long a = 0x200000000ll; long long b = 0x1ffffffffl; long long c = foo6(a, b); printf ("%lld %lld = %lld\n", a, b, c); return 0; } -------------------------------------- v64gc_zba_zbb -O3 w/o this patch: foo6: sext.w a1,a1 sext.w a0,a0 max a0,a0,a1 ret -------------------------------------- v64gc_zba_zbb -O3 w/ this patch: foo6: max a0,a0,a1 ret On Thu, Nov 11, 2021 at 10:10 PM Philipp Tomsich wrote: > > While min/minu/max/maxu instructions are provided for XLEN only, these > can safely operate on GPRs (i.e. SImode or DImode for RV64): SImode is > always sign-extended, which ensures that the XLEN-wide instructions > can be used for signed and unsigned comparisons on SImode yielding a > correct ordering of value. > > This commit > - relaxes the minmax pattern to express for GPR (instead of X only), > providing both a si3 and di3 expansion on RV64 > - adds a sign-extending form for thee si3 pattern for RV64 to all REE > to eliminate redundant extensions > - adds test-cases for both > > gcc/ChangeLog: > > * config/riscv/bitmanip.md: Relax minmax to GPR (i.e SImode or > DImode) on RV64. > * config/riscv/bitmanip.md (si3_sext): Add > pattern for REE. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zbb-min-max.c: Add testcases for SImode > operands checking that no redundant sign- or zero-extensions > are emitted. > > Signed-off-by: Philipp Tomsich > --- > > gcc/config/riscv/bitmanip.md | 14 +++++++++++--- > gcc/testsuite/gcc.target/riscv/zbb-min-max.c | 20 +++++++++++++++++--- > 2 files changed, 28 insertions(+), 6 deletions(-) > > diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md > index 000deb48b16..2a28f78f5f6 100644 > --- a/gcc/config/riscv/bitmanip.md > +++ b/gcc/config/riscv/bitmanip.md > @@ -260,13 +260,21 @@ (define_insn "bswap2" > [(set_attr "type" "bitmanip")]) > > (define_insn "3" > - [(set (match_operand:X 0 "register_operand" "=r") > - (bitmanip_minmax:X (match_operand:X 1 "register_operand" "r") > - (match_operand:X 2 "register_operand" "r")))] > + [(set (match_operand:GPR 0 "register_operand" "=r") > + (bitmanip_minmax:GPR (match_operand:GPR 1 "register_operand" "r") > + (match_operand:GPR 2 "register_operand" "r")))] > "TARGET_ZBB" > "\t%0,%1,%2" > [(set_attr "type" "bitmanip")]) > > +(define_insn "si3_sext" > + [(set (match_operand:DI 0 "register_operand" "=r") > + (sign_extend:DI (bitmanip_minmax:SI (match_operand:SI 1 "register_operand" "r") > + (match_operand:SI 2 "register_operand" "r"))))] > + "TARGET_64BIT && TARGET_ZBB" > + "\t%0,%1,%2" > + [(set_attr "type" "bitmanip")]) > + > ;; orc.b (or-combine) is added as an unspec for the benefit of the support > ;; for optimized string functions (such as strcmp). > (define_insn "orcb2" > diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max.c > index f44c398ea08..7169e873551 100644 > --- a/gcc/testsuite/gcc.target/riscv/zbb-min-max.c > +++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max.c > @@ -1,5 +1,5 @@ > /* { dg-do compile } */ > -/* { dg-options "-march=rv64gc_zbb -mabi=lp64 -O2" } */ > +/* { dg-options "-march=rv64gc_zba_zbb -mabi=lp64 -O2" } */ > > long > foo1 (long i, long j) > @@ -25,7 +25,21 @@ foo4 (unsigned long i, unsigned long j) > return i > j ? i : j; > } > > +unsigned int > +foo5(unsigned int a, unsigned int b) > +{ > + return a > b ? a : b; > +} > + > +int > +foo6(int a, int b) > +{ > + return a > b ? a : b; > +} > + > /* { dg-final { scan-assembler-times "min" 3 } } */ > -/* { dg-final { scan-assembler-times "max" 3 } } */ > +/* { dg-final { scan-assembler-times "max" 4 } } */ > /* { dg-final { scan-assembler-times "minu" 1 } } */ > -/* { dg-final { scan-assembler-times "maxu" 1 } } */ > +/* { dg-final { scan-assembler-times "maxu" 3 } } */ > +/* { dg-final { scan-assembler-not "zext.w" } } */ > +/* { dg-final { scan-assembler-not "sext.w" } } */ > -- > 2.32.0 >