From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by sourceware.org (Postfix) with ESMTPS id 9169A385BAF7 for ; Tue, 5 Dec 2023 15:30:53 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9169A385BAF7 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 9169A385BAF7 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::529 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701790255; cv=none; b=MX80nZ19vdTWmFdAYVKeVMRyCFvo/mltU3oR2G8aWaVqBowon9s930OcP467WJh8E/YgcBYQsLTTC25QebpJxMwtU2A6+sVAROaHmCCeeD0eeYX49TkzF61E1EY5CRXIV5fEf22lVaIVumcyCGVOpbEj5dpvaseBuaEun4CVIIY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701790255; c=relaxed/simple; bh=JSphDC+VCgGGukeBwiaylnfkZRpVPzVUiDdCJQ8q/Pg=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=x2wdqfNsWLfVeNAeU2FNFmBLSb0vlTV1HtXQ4hAGEE9jgjZnD8LgDTT8qHzUhEwXA53d7gx64r/4MkxXsXQVLP1oL55Mnis/Tm0nBjsCE8n/hEvdtN7bOCOct2KJObetnb5elopBnH33BdYNOcVH4EOfptwvFjQxp5xtf96ZsAk= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-54b8276361cso7138689a12.0 for ; Tue, 05 Dec 2023 07:30:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1701790252; x=1702395052; darn=gcc.gnu.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=j3OmXOysFUrdvA60mUnS85VgAm1cBFjKX/DUwp71KLc=; b=ABaSjKafp3TmYPe1CUrA382IDzTKl83e37hI7YSm5oVaYAYw8Nd9C6o6I2x+u8+ZdM KVDHahgUDzxA8r6Mmjxy8oAA+ydX4GxDtyfJSqerEaIjzm2QK0ZYNnnT9msv+GaUkHnY ZXArLb+P92OI5F91GgAcvAiNWF4c7YD6H57VKB+Wc1M6tAF+oLadcsu0GSQ0XkiW1cxy Q75ZojYreM2vAkTDAYm3zxxTB3xROV8vv9lHz8aJyCwnGOsjy6uK+jUqQpDQLZlQ3UFV iPSChW0H5cMhU0JQpU+v/wmc71wbLpIMu59j0ezYa+Q2zjmabYSHrsE03Y5HD0J1YPpw CTyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701790252; x=1702395052; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=j3OmXOysFUrdvA60mUnS85VgAm1cBFjKX/DUwp71KLc=; b=OGMFwvbISwljbwl0h3tF+rvF0am3qI4HIk7jUP5phzUuPYtKon3xEP7DvOGK9j4w/P CrPa7Vcybs7ccViCGjclfDcNv/NvWACNlISsUfiOEnkykDXUV4cR7n2Q45e1aI8hgH+Z SRo1QD0NN2Woz5EC6ITbFMCsEjrR8MvLpn/Vazn89xD/zFIeWqZAI/WfPhLP/dy3vERH pYzi+16yE8CAbTLmKmtCPBukoMSmY6njO4Rrniu6zXghd1OA2tSndmJs7PvlriVZuB6Y PiolzI45LzPRWoEV7EVSFyVtCC3mYczwSPJ19/KikYdb1/odqP701PWJfcRGg3Og3kUy D93A== X-Gm-Message-State: AOJu0Yw81/6+TWBZxr+T4H29/Y1DN+5fnvuAleK15X0+LphLmu0071om tEk2V1+efCiEwMmYQWcbVG6ejx22Vaxv1mMnfUyQpF+cNEtChQ== X-Google-Smtp-Source: AGHT+IHdN0eLDi89sInIowTGg2QNnO/W1NLDTp3XZyAXxx1/0WAtub6UBDdfPwa7xutHjgdKq/C2O82bIE3LyR8dPpc= X-Received: by 2002:a17:906:197:b0:a1d:2e32:d284 with SMTP id 23-20020a170906019700b00a1d2e32d284mr66104ejb.23.1701790252002; Tue, 05 Dec 2023 07:30:52 -0800 (PST) MIME-Version: 1.0 References: <20231109105542.4013483-1-mary.bennett@embecosm.com> <20231109105542.4013483-2-mary.bennett@embecosm.com> In-Reply-To: <20231109105542.4013483-2-mary.bennett@embecosm.com> From: Kito Cheng Date: Tue, 5 Dec 2023 23:30:40 +0800 Message-ID: Subject: Re: [PATCH 1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P To: Mary Bennett Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE,UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > index 7d7b952d817..e7d4ad1760c 100644 > --- a/gcc/config/riscv/corev.md > +++ b/gcc/config/riscv/corev.md > @@ -27,6 +27,25 @@ > > ;;CORE-V EVENT LOAD > UNSPECV_CV_ELW > + > + ;;CORE-V BITMANIP > + UNSPEC_CV_BITMANIP_EXTRACT > + UNSPEC_CV_BITMANIP_EXTRACT_INSN > + UNSPEC_CV_BITMANIP_EXTRACTR_INSN > + UNSPEC_CV_BITMANIP_EXTRACTU > + UNSPEC_CV_BITMANIP_EXTRACTU_INSN > + UNSPEC_CV_BITMANIP_EXTRACTUR_INSN > + UNSPEC_CV_BITMANIP_INSERT > + UNSPEC_CV_BITMANIP_INSERT_INSN > + UNSPEC_CV_BITMANIP_INSERTR_INSN You could reference bfe, sbfx and ubfx instructions in aarch64.md to see how to write the insert and extract bit with RTL code. > + UNSPEC_CV_BITMANIP_BCLR > + UNSPEC_CV_BITMANIP_BCLR_INSN > + UNSPEC_CV_BITMANIP_BCLRR_INSN > + UNSPEC_CV_BITMANIP_BSET > + UNSPEC_CV_BITMANIP_BSET_INSN > + UNSPEC_CV_BITMANIP_BSETR_INSN Just use generic RTL code for bset and bclr is fine, you could reference bitmanip.md > + UNSPEC_CV_BITMANIP_BITREV > + UNSPEC_CV_BITMANIP_FL1 > ]) >