From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by sourceware.org (Postfix) with ESMTPS id 2FD4F3857343 for ; Fri, 21 Oct 2022 07:35:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2FD4F3857343 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ed1-x534.google.com with SMTP id l22so3033610edj.5 for ; Fri, 21 Oct 2022 00:35:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=LXbQS8m8CRKiiTmmPX+jVyIsIYpzhLCZXdomBpMU+Cc=; b=bU4bwXHT5niGzmCCkRiM8OhWI8gX3peOv7QIfvnF6Te71Cjzq8IQXeTpt+m22p4wxv if5bR178OUZNCArHcYxGUclUxyPyOa7RCL10jBijNsIiikFxYlXXT3lF/F9wt8sNmJGo CulpKYk/wHW4U5MVybFdIzgzLemsCUieMHyH/9FZbDSMSoOjLm+vgrsUybsNy3aJoaDJ O45xvr25smv8diM0QsL3EPhXtq9rYQDCKSVVRJWQJg7p8jqqVaf5zbm+TOZaqvUscb5V 7epZIe37S8FFj2BUg88VZMf8Qyqcc/ipq60y10BQ5lzS0D2IpfTJV/Zw0NNC+9oGo6gy ifSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=LXbQS8m8CRKiiTmmPX+jVyIsIYpzhLCZXdomBpMU+Cc=; b=zxWisx6iXWR/6RLonf+/p1LMQt6bJUJeMl4DmMoWfL0lwcIn9uY7E2kxZsvOE1Vlrc jgYVclPOZ4TD/WLEacNnPmsLQU7dCuMQXpMfBowL4ZZCE64n840wQ8FQbmL2zlcOpG6D VfBB5YC4LNks7RVB6Im8j5mpeHiGo8IhF4N7VodhbK0MhR38+8BNaFkRDosAC4ziDRs4 Y5uG41KlgIt0Im5Cd2ZGygAny98qfo8SX8Wf1XLLXIHoYb3/mJ5CcA8Ctbb2pDpGhxa2 tHavXA8WIG92L/l6leV/Jpi7MFRjDylt9BLZcNLWd976TjlXyNM9xOnlI1pLvskVoxwA TbvA== X-Gm-Message-State: ACrzQf1vCQO9k/FLocOE4wzynZsS4o2Q5pxwo4hl/slQdDY5Ska6eMpJ v9AQfjTMCevmB5xxO+Zt7nNmezFwFOA955UOp1o= X-Google-Smtp-Source: AMsMyM49JKiw0O9yL8zSEr4vB/ktYWYoXta5dbg1bMQBVJIKOprSJ7aUqvTjeyV0Pc8QxizjYxNlkKUpFBAjjkB59u8= X-Received: by 2002:a05:6402:5211:b0:45d:131b:8dd7 with SMTP id s17-20020a056402521100b0045d131b8dd7mr16226650edd.93.1666337716601; Fri, 21 Oct 2022 00:35:16 -0700 (PDT) MIME-Version: 1.0 References: <20221021050159.121335-1-monk.chiang@sifive.com> In-Reply-To: <20221021050159.121335-1-monk.chiang@sifive.com> From: Kito Cheng Date: Fri, 21 Oct 2022 15:35:04 +0800 Message-ID: Subject: Re: [PATCH] RISC-V: Add type attribute for atomic instructions. To: Monk Chiang Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Committed, thanks :) On Fri, Oct 21, 2022 at 1:02 PM Monk Chiang wrote: > > gcc/ChangeLog: > > * config/riscv/riscv.md: Add atomic type attribute. > * config/riscv/sync.md: Add atomic type for atomic instructions. > --- > gcc/config/riscv/riscv.md | 2 +- > gcc/config/riscv/sync.md | 15 ++++++++++----- > 2 files changed, 11 insertions(+), 6 deletions(-) > > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md > index b3654915fde..9384ced0447 100644 > --- a/gcc/config/riscv/riscv.md > +++ b/gcc/config/riscv/riscv.md > @@ -317,7 +317,7 @@ > "unknown,branch,jump,call,load,fpload,store,fpstore, > mtc,mfc,const,arith,logical,shift,slt,imul,idiv,move,fmove,fadd,fmul, > fmadd,fdiv,fcmp,fcvt,fsqrt,multi,auipc,sfb_alu,nop,ghost,bitmanip,rotate, > - rdvlenb,rdvl,vsetvl,vlde,vste,vldm,vstm,vlds,vsts, > + atomic,rdvlenb,rdvl,vsetvl,vlde,vste,vldm,vstm,vlds,vsts, > vldux,vldox,vstux,vstox,vldff,vldr,vstr, > vialu,viwalu,vext,vicalu,vshift,vnshift,vicmp, > vimul,vidiv,viwmul,vimuladd,viwmuladd,vimerge,vimov, > diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md > index 7deb290d9dc..449f275e6a2 100644 > --- a/gcc/config/riscv/sync.md > +++ b/gcc/config/riscv/sync.md > @@ -62,7 +62,8 @@ > UNSPEC_ATOMIC_STORE))] > "TARGET_ATOMIC" > "%F2amoswap.%A2 zero,%z1,%0" > - [(set (attr "length") (const_int 8))]) > + [(set_attr "type" "atomic") > + (set (attr "length") (const_int 8))]) > > (define_insn "atomic_" > [(set (match_operand:GPR 0 "memory_operand" "+A") > @@ -73,7 +74,8 @@ > UNSPEC_SYNC_OLD_OP))] > "TARGET_ATOMIC" > "%F2amo.%A2 zero,%z1,%0" > - [(set (attr "length") (const_int 8))]) > + [(set_attr "type" "atomic") > + (set (attr "length") (const_int 8))]) > > (define_insn "atomic_fetch_" > [(set (match_operand:GPR 0 "register_operand" "=&r") > @@ -86,7 +88,8 @@ > UNSPEC_SYNC_OLD_OP))] > "TARGET_ATOMIC" > "%F3amo.%A3 %0,%z2,%1" > - [(set (attr "length") (const_int 8))]) > + [(set_attr "type" "atomic") > + (set (attr "length") (const_int 8))]) > > (define_insn "atomic_exchange" > [(set (match_operand:GPR 0 "register_operand" "=&r") > @@ -98,7 +101,8 @@ > (match_operand:GPR 2 "register_operand" "0"))] > "TARGET_ATOMIC" > "%F3amoswap.%A3 %0,%z2,%1" > - [(set (attr "length") (const_int 8))]) > + [(set_attr "type" "atomic") > + (set (attr "length") (const_int 8))]) > > (define_insn "atomic_cas_value_strong" > [(set (match_operand:GPR 0 "register_operand" "=&r") > @@ -112,7 +116,8 @@ > (clobber (match_scratch:GPR 6 "=&r"))] > "TARGET_ATOMIC" > "%F5 1: lr.%A5 %0,%1; bne %0,%z2,1f; sc.%A4 %6,%z3,%1; bnez %6,1b; 1:" > - [(set (attr "length") (const_int 20))]) > + [(set_attr "type" "atomic") > + (set (attr "length") (const_int 20))]) > > (define_expand "atomic_compare_and_swap" > [(match_operand:SI 0 "register_operand" "") ;; bool output > -- > 2.37.2 >