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From: Kito Cheng <kito.cheng@gmail.com>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: gcc-patches@gcc.gnu.org, jeffreyalaw@gmail.com,
	juzhe.zhong@rivai.ai,  kito.cheng@sifive.com
Subject: Re: [wwwdocs] gcc-13: Add release note for RISC-V
Date: Wed, 19 Apr 2023 23:08:48 +0800	[thread overview]
Message-ID: <CA+yXCZAwT5QJVfcQn=K3tDFFovfn2wK-_-9RahT6h5MWGGR7fw@mail.gmail.com> (raw)
In-Reply-To: <mhng-8e5812f8-42c5-441d-9ad3-716ab6394ecb@palmer-ri-x1c9>

[-- Attachment #1: Type: text/plain, Size: 2698 bytes --]

> On Wed, 19 Apr 2023 06:53:51 PDT (-0700), kito.cheng@sifive.com wrote:
> > ---
> >  htdocs/gcc-13/changes.html | 31 ++++++++++++++++++++++++++++++-
> >  1 file changed, 30 insertions(+), 1 deletion(-)
> >
> > diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
> > index f6941534..5427f805 100644
> > --- a/htdocs/gcc-13/changes.html
> > +++ b/htdocs/gcc-13/changes.html
> > @@ -636,9 +636,32 @@ a work-in-progress.</p>
> >
> >  <h3 id="riscv">RISC-V</h3>
> >  <ul>
> > -    <li>New ISA extension support for zawrs.</li>
> > +    <li>Supports vector intrinsics as specified in <a
>
> Maybe "Support for vector intrinsics"?  That matches how the other ones
> are written.


Thanks, seems like I can’t rely on chatgpt to proofread too much :p


>
> > +     href="
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/tree/v0.11.x">
> > +     version 0.11 of the RISC-V vector intrinsic specification</a>,
> > +     thanks Ju-Zhe Zhong from <a href="https://rivai-ic.com.cn/
> ">RiVAI</a>
> > +     for contributing most of implementation.
> > +    </li>
> >      <li>Support for the following vendor extensions has been added:
> >        <ul>
> > +     <li>Zawrs</li>
>
> These aren't vendor extensions.  We should probably have another header.



Oh damm, good catch.


>
> > +     <li>Zicbom</li>
> > +     <li>Zicboz</li>
> > +     <li>Zicbop</li>
> > +     <li>Zfh</li>
> > +     <li>Zfhmin</li>
> > +     <li>Zmmul</li>
> > +     <li>Zdinx</li>
> > +     <li>Zfinx</li>
> > +     <li>Zhinx</li>
> > +     <li>Zhinxmin</li>
> > +     <li>Zksh</li>
> > +     <li>Zksed</li>
> > +     <li>Zknd</li>
> > +     <li>Zkne</li>
> > +     <li>Zbkb</li>
> > +     <li>Zbkc</li>
> > +     <li>Zbkx</li>
> >          <li>XTheadBa</li>
> >          <li>XTheadBb</li>
> >          <li>XTheadBs</li>
> > @@ -657,8 +680,14 @@ a work-in-progress.</p>
> >        option (GCC identifiers in parentheses).
> >        <ul>
> >          <li>T-Head's XuanTie C906 (<code>thead-c906</code>).</li>
> > +        <li>Ventana's VT1 (<code>ventana-vt1</code>).</li>
>
> IIRC we didn't actually merge the VT1 stuff, it was deferred for gcc-14.


Ok, I guess it because i just grab that by tig —grep ^RISC and missed the
revert commit.


> >        </ul>
> >      </li>
> > +    <li>Improves the multi-lib selection mechanism for the bare-metal
> toolchain
> > +     (riscv*-elf*). GCC will now automatically select the best-fit
> multi-lib
> > +     candidate instead of requiring all possible reuse rules to be
> listed at
> > +     build time.
> > +    </li>
> >  </ul>
> >
> >  <!-- <h3 id="rx">RX</h3> -->
>

  reply	other threads:[~2023-04-19 15:09 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-19 13:53 Kito Cheng
2023-04-19 14:38 ` 钟居哲
2023-04-19 14:42 ` Palmer Dabbelt
2023-04-19 15:08   ` Kito Cheng [this message]
2023-04-20  6:22 jiawei
2023-04-20  6:35 ` Kito Cheng

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