From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by sourceware.org (Postfix) with ESMTPS id 66F5E385086C for ; Wed, 12 Oct 2022 13:04:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 66F5E385086C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ej1-x62d.google.com with SMTP id b2so37849438eja.6 for ; Wed, 12 Oct 2022 06:04:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=9nWca6Vdwa8OlJtoTqfMXhuVfqdGM39Jy3a7igjUwLk=; b=A/Os3casOmpevlCRbJI3jLEk5oUwnvPaftrIcQhYzkYZ6kGHTKwfGj9lLaiYrFpT6i YhOS+e9++m/NFw4beohRvqa2+QHvbiIGYN2ei0nvOX/ScDfb7P5DeKVa1IZXFHXia0CK J/oWAVf43Vl9gm1UkTMbXE0Qfz5QwGWKc55FMh3Gx4Tqg5aDKh2lkVK94TqljnG+VDmT kAURx5+cg8FYpyJy841HPN8pzqAnrY0pZWOs0BiWwnDv2SF5ybtw2w0ARCchQTFzuNWX 4+/2xs5lpgdMHWAwgkPL5JwR4j/X7E8g4WCs1FWtvhb18QjNY2azDMoLdDdaET0hyKNK U1CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=9nWca6Vdwa8OlJtoTqfMXhuVfqdGM39Jy3a7igjUwLk=; b=OcHieKFHjAV/OtWOnYSk8aKlqZcjLZu2HAEQ+kBZIQHKTcYPqOQJzkIkUuPYk45DP1 MxKCIiC4Z9XY/9sKE381YTfiNC/5rgp0fkKCbiy4iNI0dpZPKa71+pgQ0F9GRrRO4Msy IvOLjtbl6O5YF/iahb2plKENl6zfJeh8sm/1/pTQqsZH+Qczm6/irz8WBDyI9D1T4Bua 9ksuhnUH9oH6RpFtiISpKMBqYb9YZmK0fd/RLvdUNK0iN5ZlF8xovACIQap5lNk8GpQp OrXEA4OnoNkLnhj6+0L7eENra9LTXVfEFB+dMgjZZoI0aQ/Z+we2oiA4YTnsY9TrH2VX ff5Q== X-Gm-Message-State: ACrzQf2NGKspJimBTKYD7FgRkjRK6dRTpQMoDMo+TFe2HEj5ZkKlqM1H 6BLaxn/R0/3Iy1jncA3pXgn13WvOvajHxAWpG+/ZJEX5 X-Google-Smtp-Source: AMsMyM4qk42Hsd95elTkIMcA7xrPOHYg7xIuuAkh0IaUxphch9AUBwg+fcMbz9Dr0Ch146I8BHejlQCr1L+4fBqDUqQ= X-Received: by 2002:a17:907:2da6:b0:78d:3cf1:9132 with SMTP id gt38-20020a1709072da600b0078d3cf19132mr22736203ejc.299.1665579843587; Wed, 12 Oct 2022 06:04:03 -0700 (PDT) MIME-Version: 1.0 References: <20221011061521.65729-1-juzhe.zhong@rivai.ai> In-Reply-To: <20221011061521.65729-1-juzhe.zhong@rivai.ai> From: Kito Cheng Date: Wed, 12 Oct 2022 21:03:51 +0800 Message-ID: Subject: Re: [PATCH] RISC-V: Refine register_builtin_types function. To: juzhe.zhong@rivai.ai Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Committed with a few minor ChangeLog fixes. On Tue, Oct 11, 2022 at 2:15 PM wrote: > > From: Ju-Zhe Zhong > > gcc/ChangeLog: > > * config/riscv/riscv-vector-builtins.cc (GTY): Redefine vector types. > (build_const_pointer): New function. > (register_builtin_type): Ditto. > (DEF_RVV_TYPE): Simplify macro. > (register_vector_type): Refine implementation. > * config/riscv/riscv-vector-builtins.h (struct GTY): New struct. > > --- > gcc/config/riscv/riscv-vector-builtins.cc | 81 ++++++++++++----------- > gcc/config/riscv/riscv-vector-builtins.h | 10 +++ > 2 files changed, 51 insertions(+), 40 deletions(-) > > diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc > index 6fd1bb0fcb2..daf180801cc 100644 > --- a/gcc/config/riscv/riscv-vector-builtins.cc > +++ b/gcc/config/riscv/riscv-vector-builtins.cc > @@ -73,18 +73,14 @@ static CONSTEXPR const vector_type_info vector_types[] = { > #include "riscv-vector-builtins.def" > }; > > -/* The scalar type associated with each vector type. */ > -static GTY (()) tree scalar_types[NUM_VECTOR_TYPES]; > -/* The machine mode associated with each vector type. */ > -static GTY (()) machine_mode vector_modes[NUM_VECTOR_TYPES]; > /* The RVV types, with their built-in > "__rvv..._t" name. Allow an index of NUM_VECTOR_TYPES, which always > yields a null tree. */ > static GTY(()) tree abi_vector_types[NUM_VECTOR_TYPES + 1]; > > /* Same, but with the riscv_vector.h "v..._t" name. */ > -extern GTY(()) tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1]; > -tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1]; > +extern GTY (()) rvv_builtin_types_t builtin_types[NUM_VECTOR_TYPES + 1]; > +rvv_builtin_types_t builtin_types[NUM_VECTOR_TYPES + 1]; > > /* Add type attributes to builtin type tree, currently only the mangled name. */ > static void > @@ -123,6 +119,39 @@ lookup_vector_type_attribute (const_tree type) > return lookup_attribute ("RVV type", TYPE_ATTRIBUTES (type)); > } > > +/* Return a representation of "const T *". */ > +static tree > +build_const_pointer (tree t) > +{ > + return build_pointer_type (build_qualified_type (t, TYPE_QUAL_CONST)); > +} > + > +/* Helper function for register a single built-in RVV ABI type. */ > +static void > +register_builtin_type (vector_type_index type, tree eltype, machine_mode mode) > +{ > + builtin_types[type].scalar = eltype; > + builtin_types[type].scalar_ptr = build_pointer_type (eltype); > + builtin_types[type].scalar_const_ptr = build_const_pointer (eltype); > + if (!riscv_v_ext_enabled_vector_mode_p (mode)) > + return; > + > + tree vectype = build_vector_type_for_mode (eltype, mode); > + gcc_assert (VECTOR_MODE_P (TYPE_MODE (vectype)) && TYPE_MODE (vectype) == mode > + && TYPE_MODE_RAW (vectype) == mode && TYPE_ALIGN (vectype) <= 128 > + && known_eq (tree_to_poly_uint64 (TYPE_SIZE (vectype)), > + GET_MODE_BITSIZE (mode))); > + vectype = build_distinct_type_copy (vectype); > + gcc_assert (vectype == TYPE_MAIN_VARIANT (vectype)); > + SET_TYPE_STRUCTURAL_EQUALITY (vectype); > + TYPE_ARTIFICIAL (vectype) = 1; > + TYPE_INDIVISIBLE_P (vectype) = 1; > + add_vector_type_attribute (vectype, vector_types[type].mangled_name); > + make_type_sizeless (vectype); > + abi_vector_types[type] = vectype; > + lang_hooks.types.register_builtin_type (vectype, vector_types[type].abi_name); > +} > + > /* Register the built-in RVV ABI types, such as __rvv_int32m1_t. */ > static void > register_builtin_types () > @@ -137,42 +166,12 @@ register_builtin_types () > = TARGET_64BIT ? unsigned_intSI_type_node : long_unsigned_type_node; > > machine_mode mode; > -#define DEF_RVV_TYPE(NAME, NCHARS, ABI_NAME, SCALAR_TYPE, VECTOR_MODE, \ > - VECTOR_MODE_MIN_VLEN_32) \ > +#define DEF_RVV_TYPE(NAME, NCHARS, ABI_NAME, SCALAR_TYPE, VECTOR_MODE, \ > + VECTOR_MODE_MIN_VLEN_32, ARGS...) \ > mode = TARGET_MIN_VLEN > 32 ? VECTOR_MODE##mode \ > : VECTOR_MODE_MIN_VLEN_32##mode; \ > - scalar_types[VECTOR_TYPE_##NAME] \ > - = riscv_v_ext_enabled_vector_mode_p (mode) ? SCALAR_TYPE##_type_node \ > - : NULL_TREE; \ > - vector_modes[VECTOR_TYPE_##NAME] \ > - = riscv_v_ext_enabled_vector_mode_p (mode) ? mode : VOIDmode; > + register_builtin_type (VECTOR_TYPE_##NAME, SCALAR_TYPE##_type_node, mode); > #include "riscv-vector-builtins.def" > - > - for (unsigned int i = 0; i < NUM_VECTOR_TYPES; ++i) > - { > - tree eltype = scalar_types[i]; > - mode = vector_modes[i]; > - /* We disabled the datatypes according '-march'. */ > - if (!eltype) > - continue; > - > - tree vectype = build_vector_type_for_mode (eltype, mode); > - gcc_assert ( > - VECTOR_MODE_P (TYPE_MODE (vectype)) && TYPE_MODE (vectype) == mode > - && TYPE_MODE_RAW (vectype) == mode && TYPE_ALIGN (vectype) <= 128 > - && known_eq (tree_to_poly_uint64 (TYPE_SIZE (vectype)), > - GET_MODE_BITSIZE (mode))); > - vectype = build_distinct_type_copy (vectype); > - gcc_assert (vectype == TYPE_MAIN_VARIANT (vectype)); > - SET_TYPE_STRUCTURAL_EQUALITY (vectype); > - TYPE_ARTIFICIAL (vectype) = 1; > - TYPE_INDIVISIBLE_P (vectype) = 1; > - add_vector_type_attribute (vectype, vector_types[i].mangled_name); > - make_type_sizeless (vectype); > - abi_vector_types[i] = vectype; > - lang_hooks.types.register_builtin_type (vectype, > - vector_types[i].abi_name); > - } > } > > /* Register vector type TYPE under its risv_vector.h name. */ > @@ -180,6 +179,7 @@ static void > register_vector_type (vector_type_index type) > { > tree vectype = abi_vector_types[type]; > + > /* When vectype is NULL, the corresponding builtin type > is disabled according to '-march'. */ > if (!vectype) > @@ -198,7 +198,8 @@ register_vector_type (vector_type_index type) > && TYPE_MAIN_VARIANT (TREE_TYPE (decl)) == vectype) > vectype = TREE_TYPE (decl); > > - builtin_vector_types[0][type] = vectype; > + builtin_types[type].vector = vectype; > + builtin_types[type].vector_ptr = build_pointer_type (vectype); > } > > /* RAII class for enabling enough RVV features to define the built-in > diff --git a/gcc/config/riscv/riscv-vector-builtins.h b/gcc/config/riscv/riscv-vector-builtins.h > index 5c01a760657..7d4b807f33c 100644 > --- a/gcc/config/riscv/riscv-vector-builtins.h > +++ b/gcc/config/riscv/riscv-vector-builtins.h > @@ -36,6 +36,16 @@ enum vector_type_index > NUM_VECTOR_TYPES > }; > > +/* Builtin types that are used to register RVV intrinsics. */ > +struct GTY (()) rvv_builtin_types_t > +{ > + tree vector; > + tree scalar; > + tree vector_ptr; > + tree scalar_ptr; > + tree scalar_const_ptr; > +}; > + > } // end namespace riscv_vector > > #endif > -- > 2.36.1 >