From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vs1-xe36.google.com (mail-vs1-xe36.google.com [IPv6:2607:f8b0:4864:20::e36]) by sourceware.org (Postfix) with ESMTPS id C48063856DE7 for ; Mon, 18 Sep 2023 08:08:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C48063856DE7 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-vs1-xe36.google.com with SMTP id ada2fe7eead31-4526b9078b2so185747137.0 for ; Mon, 18 Sep 2023 01:08:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1695024525; x=1695629325; darn=gcc.gnu.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=ihDwOfYmukCQz6r+bTNABdIFPwsthJ3xBEvEVqWHjx0=; b=lLqMjWDl/vO5qjKGAnqkIPeAQYvKJBX6TU1AGMDVRDfjDa90qaIeJJQhF1FiSv/dZ7 ll2RC/M7UA2xSHpcLDnhz6d1Td5y0SN4IP24FCgoV+8J8fPebh4iqRc6OkcRDhFqqgXE eD6zeiJiszX5RLXbAN7OC9ZHZOTGdyLbrjg9KeJlYy2UFv9lDqboWzGDbt+sPhH9RqAj 1nXAtwlt0ksHbvKaqfV+0N8aoP4edcd9ZIEVt+KLV+o0YWfDRc8xkaSejVOUkh7DIcHq F8xMQXl9C27pN6A4+Rc6oo8plg9XDeIHLnUke/EjGtHwblnA2sZIOi9LiHv48UKdQxmV UgqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695024525; x=1695629325; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ihDwOfYmukCQz6r+bTNABdIFPwsthJ3xBEvEVqWHjx0=; b=N+m46YQej2BUQZcJm8g0HQ9C2sOtOROc//docuL1+v3/ntFATRR765tKtKwxqV/9lL kH0WhPs+Z5fkeh8/VdyzYbRNl5tdHTRqLgCVE4hWu2mZTXocXjqZzqSwWgMwog6sEdQh bsLsKMcAIEe9q1BHT4VRGZGGcs1Xbo0s9mO5j+F0vher/zjsnVrz/Y6YZ7FAoIIurya/ /yfoKx99X+c5U5hHq9ks8qzZV8HA1GwBulipOX8AAGHblZ2h8ub8M3Eksp0e5ovOyAa0 mSKkagDsBgCgM9V7CTuOD8rnGdDa51nehL1JJbZbvVmnsw5bBwB00PKb78LWDNwXccYu hnag== X-Gm-Message-State: AOJu0Yy2zUWadsf1LRVQNTwNObdCUDfvC3atiCO3FLWDzS8fEHIbvACD d3IThtp1e7f3MwnaskRfa5VqOt/U593GC6ETCxDndyqaa0melQ== X-Google-Smtp-Source: AGHT+IHYZMbYvKlW7iqMTG26KU2jeioYcSgPRUWW2B/Ov+4MTqeNg/o6Hdv0M7SfCWnDY49QBOAM6r/eSg4+vQkeGmg= X-Received: by 2002:a05:6102:5090:b0:452:635b:8440 with SMTP id bl16-20020a056102509000b00452635b8440mr1003917vsb.30.1695024524885; Mon, 18 Sep 2023 01:08:44 -0700 (PDT) MIME-Version: 1.0 References: <20230830095134.3571077-1-lehua.ding@rivai.ai> <6F10CC05B8E5556B+2023083108073633385031@rivai.ai> <6AEFDC73A08F2055+28556a8d-3c5e-4601-80be-69b1f42ff31e@rivai.ai> In-Reply-To: From: Kito Cheng Date: Mon, 18 Sep 2023 16:08:34 +0800 Message-ID: Subject: Re: [PATCH] RISC-V: Fix vsetvl pass ICE To: Lehua Ding Cc: gcc-patches , "juzhe.zhong@rivai.ai" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: OK for backport now, steps for backport: - checkout to releases/gcc-13 branch - ./contrib/git-backport.py - Make sure everything is alright, build-able, no extra regression. - push releases/gcc-13 branch! On Mon, Sep 18, 2023 at 3:54=E2=80=AFPM Lehua Ding wr= ote: > > Hi Kito, > > Can this bugfix be backported to GCC 13 now? If so, how can I do it? > > On 2023/8/31 10:12, Lehua Ding wrote: > > Committed to the trunk and backported to GCC 13 one week later. > > Thanks Juzhe and Kito. > > > > On 2023/8/31 9:44, Kito Cheng via Gcc-patches wrote: > >> OK for gcc 13 branch too, the general rule for backport is to wait one > >> week on trunk to make sure the fix is stable. > >> > >> > >> On Thu, Aug 31, 2023 at 8:08=E2=80=AFAM juzhe.zhong@rivai.ai > >> wrote: > >>> > >>> Ok for trunk. But not sure whether it's ok for GCC-13. > >>> > >>> > >>> > >>> juzhe.zhong@rivai.ai > >>> > >>> From: Lehua Ding > >>> Date: 2023-08-30 17:51 > >>> To: gcc-patches > >>> CC: juzhe.zhong; kito.cheng; rdapp.gcc; palmer; jeffreyalaw > >>> Subject: [PATCH] RISC-V: Fix vsetvl pass ICE > >>> This patch fix pr111234 (a vsetvl pass ICE) when fuse a mask any > >>> vlmax vsetvl_vtype_change_only insn with a mu vsetvl insn. > >>> > >>> PR target/111234 > >>> > >>> gcc/ChangeLog: > >>> > >>> * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition. > >>> > >>> gcc/testsuite/ChangeLog: > >>> > >>> * gcc.target/riscv/rvv/vsetvl/pr111234.c: New test. > >>> > >>> --- > >>> gcc/config/riscv/riscv-vsetvl.cc | 2 +- > >>> .../gcc.target/riscv/rvv/vsetvl/pr111234.c | 19 ++++++++++++++++++= + > >>> 2 files changed, 20 insertions(+), 1 deletion(-) > >>> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234= .c > >>> > >>> diff --git a/gcc/config/riscv/riscv-vsetvl.cc > >>> b/gcc/config/riscv/riscv-vsetvl.cc > >>> index 1386d9250ca..a81bb53a521 100644 > >>> --- a/gcc/config/riscv/riscv-vsetvl.cc > >>> +++ b/gcc/config/riscv/riscv-vsetvl.cc > >>> @@ -655,7 +655,7 @@ gen_vsetvl_pat (rtx_insn *rinsn, const > >>> vector_insn_info &info, > >>> new_pat =3D gen_vsetvl_pat (VSETVL_NORMAL, new_info, vl); > >>> else > >>> { > >>> - if (vsetvl_insn_p (rinsn) || vlmax_avl_p (info.get_avl ())) > >>> + if (vsetvl_insn_p (rinsn)) > >>> new_pat =3D gen_vsetvl_pat (VSETVL_NORMAL, new_info, get_vl (rinsn)); > >>> else if (INSN_CODE (rinsn) =3D=3D CODE_FOR_vsetvl_vtype_chang= e_only) > >>> new_pat =3D gen_vsetvl_pat (VSETVL_VTYPE_CHANGE_ONLY, new_info, NULL_= RTX); > >>> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c > >>> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c > >>> new file mode 100644 > >>> index 00000000000..ee5eec4a257 > >>> --- /dev/null > >>> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c > >>> @@ -0,0 +1,19 @@ > >>> +/* { dg-do compile } */ > >>> +/* { dg-options "-march=3Drv64gcv -mabi=3Dlp64d -O3" } */ > >>> + > >>> +#include > >>> + > >>> +void > >>> +f (vint32m1_t *in, vint64m2_t *out, vbool32_t *m, int b) > >>> +{ > >>> + vint32m1_t va =3D *in; > >>> + vbool32_t mask =3D *m; > >>> + vint64m2_t vb > >>> + =3D __riscv_vwadd_vx_i64m2_m (mask, va, 1, __riscv_vsetvlmax_e64= m2 > >>> ()); > >>> + vint64m2_t vc =3D __riscv_vadd_vx_i64m2 (vb, 1, > >>> __riscv_vsetvlmax_e64m2 ()); > >>> + > >>> + if (b !=3D 0) > >>> + vc =3D __riscv_vadd_vx_i64m2_mu (mask, vc, vc, 1, > >>> __riscv_vsetvlmax_e64m2 ()); > >>> + > >>> + *out =3D vc; > >>> +} > >>> -- > >>> 2.36.3 > >>> > > > > -- > Best, > Lehua >