From: Kito Cheng <kito.cheng@gmail.com>
To: Jiawei <jiawei@iscas.ac.cn>
Cc: gcc-patches@gcc.gnu.org, kito.cheng@sifive.com,
palmer@dabbelt.com, christoph.muellner@vrull.eu,
wuwei2016@iscas.ac.cn
Subject: Re: [PATCH] RISC-V: Add Z*inx incompatible check in gcc.
Date: Mon, 27 Mar 2023 16:15:00 +0800 [thread overview]
Message-ID: <CA+yXCZB1T+QZygRdtLRSV=d5khU1T8wUaDMeE5d4X0N8fq+YBw@mail.gmail.com> (raw)
In-Reply-To: <20230326083458.1240538-1-jiawei@iscas.ac.cn>
HI Jiawei:
Thanks for the fix!
Two comments:
- Could you add testcase like
https://github.com/gcc-mirror/gcc/blob/master/gcc/testsuite/gcc.target/riscv/arch-12.c
- And I would prefer those check happened in riscv_subset_list::parse
@gcc/common/config/riscv/riscv-common.cc
On Sun, Mar 26, 2023 at 4:36 PM Jiawei <jiawei@iscas.ac.cn> wrote:
>
> Z*inx is conflict with float extensions, add incompatible check when
> z*inx and hard_float both enabled.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_option_override): New check.
>
> ---
> gcc/config/riscv/riscv.cc | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 76eee4a55e9..162ba14d3c7 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -6285,6 +6285,10 @@ riscv_option_override (void)
> && riscv_abi != ABI_LP64 && riscv_abi != ABI_ILP32E)
> error ("z*inx requires ABI ilp32, ilp32e or lp64");
>
> + // Zfinx is conflict with float extensions.
> + if (TARGET_ZFINX && TARGET_HARD_FLOAT)
> + error ("z*inx is conflict with float extensions");
> +
> /* We do not yet support ILP32 on RV64. */
> if (BITS_PER_WORD != POINTER_SIZE)
> error ("ABI requires %<-march=rv%d%>", POINTER_SIZE);
> --
> 2.25.1
>
next prev parent reply other threads:[~2023-03-27 8:15 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-26 8:34 Jiawei
2023-03-27 8:15 ` Kito Cheng [this message]
2023-03-28 14:36 ` Re: [PATCH v2] RISC-V: Add Z*inx imcompatible " jiawei
2023-03-28 14:43 ` Kito Cheng
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