From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vk1-xa2b.google.com (mail-vk1-xa2b.google.com [IPv6:2607:f8b0:4864:20::a2b]) by sourceware.org (Postfix) with ESMTPS id F3A863858416 for ; Tue, 6 Jun 2023 01:32:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org F3A863858416 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-vk1-xa2b.google.com with SMTP id 71dfb90a1353d-46131c8093bso916117e0c.3 for ; Mon, 05 Jun 2023 18:32:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686015143; x=1688607143; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=yFpPGQK9HfLP4QbdxodeqauWbQSVAVlgs3Bk3HfG6iE=; b=A1qYZwOT2sN/rpUxQ2tNMzHheBTT3IsOm34MZeUcaj6j5REPT11oTfYOWGrENEXCJY kyEsJWQqgQz9kR+qQWddDwD2It+irUz7R/CDNjEOj1QjcYbpra2LS/2lpzJE2M6+0OTP 0WwnNs46ck7YNIAG4bR+47hzeAFhljXoocv1PKjIBgLYrl6LSlI6WyX8UF1S8D5nFGCP lA9mfkkeipw0rGvRP+e1SKJoZPelWSW7mcE9RgvB9Ml/cQq//S5NPtt1SZAFOi0cHoJA fi25y7daMn5Ds/Fl+riIBDsGmiudimz/+uD0stD+NtWcVHj+TrTeGQlKhJ7yPW0XSg1E CZeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686015143; x=1688607143; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=yFpPGQK9HfLP4QbdxodeqauWbQSVAVlgs3Bk3HfG6iE=; b=Hy5I79b3EvKbOonWQybOzDyNA4Ttn5FlxtNnDiD9s4XWdv6yr9D23SAuXl+5uvYpl/ 5uTZs8ohu2QCi+nqsssMQAW9Wa9krNHll1Gtou5ssxe+wc7pji9iIha7lGKTktPRYVah l3sSNMb1aPJKuwG4i7mKES8YRBKoU14/HpX7+1cw/yZFRjQT6BNMXeISjucu0XJHqHMY kronUXAx+SjIBKmC7E9mfv5YULkyTbGSZkM33mtFsqc5edUj7TZuA1jUXgWqEgFE7cwT ilxT4rV52xWCObzNparx/fkwxdOjOarkPbn70junETvP3jZ82VKaF2QrzzRa4ZM8DM7q xfzQ== X-Gm-Message-State: AC+VfDw1yG6ED+17MrMpNW/CruD3DM/URWQlcoMg2GNOCQ2dxlxfOk2n B4Q8uhNm+7Jvrg6gSMGl42m3emH2AJGuFT/fabo= X-Google-Smtp-Source: ACHHUZ6Kt5ueoHADNbD+Tzmn8OzNrYcvGuyHMXcwNhGSWTk6cCIpk2OlfwsoLeMbMplfoCk8eMePcH8BJbDJQzrnaNw= X-Received: by 2002:a67:eeca:0:b0:439:3c15:da5b with SMTP id o10-20020a67eeca000000b004393c15da5bmr459920vsp.17.1686015143079; Mon, 05 Jun 2023 18:32:23 -0700 (PDT) MIME-Version: 1.0 References: <20230605144952.2546564-1-pan2.li@intel.com> <60250B9FED9AB19E+2023060609104365666371@rivai.ai> In-Reply-To: <60250B9FED9AB19E+2023060609104365666371@rivai.ai> From: Kito Cheng Date: Tue, 6 Jun 2023 09:32:12 +0800 Message-ID: Subject: Re: [PATCH v1] RISC-V: Support RVV FP16 ZVFH Reduction floating-point intrinsic API To: "juzhe.zhong@rivai.ai" Cc: "pan2.li" , gcc-patches , "Kito.cheng" , "yanzhang.wang" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md > index e4f2ba90799..c338e3c9003 100644 > --- a/gcc/config/riscv/vector-iterators.md > +++ b/gcc/config/riscv/vector-iterators.md > @@ -330,10 +330,18 @@ (define_mode_iterator VF_ZVE32 [ > ]) > (define_mode_iterator VWF [ > + (VNx1HF "TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN < 128") > + (VNx2HF "TARGET_VECTOR_ELEN_FP_16") > + (VNx4HF "TARGET_VECTOR_ELEN_FP_16") > + (VNx8HF "TARGET_VECTOR_ELEN_FP_16") > + (VNx16HF "TARGET_VECTOR_ELEN_FP_16") > + (VNx32HF "TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN > 32") > + (VNx64HF "TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128") I am little concern about using TARGET_VECTOR_ELEN_FP_16 as predictor here, zvfhmin also set TARGET_VECTOR_ELEN_FP_16 flag, so it means zvfhmin also enabled reduction? and also has the same concern for V and VF in the last patch[1] too. [1] https://patchwork.sourceware.org/project/gcc/patch/20230605082043.1707158-1-pan2.li@intel.com/ Give a more practical example to explain my concern: We've using V and VF iterators in autovec.md, and zvfhmin will set MASK_VECTOR_ELEN_FP_16 which means zvfhmin WILL enable most autovec patterns with fp16, that should not what we expected to do I think?