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References: <20230828031217.2801549-1-juzhe.zhong@rivai.ai>
In-Reply-To: <20230828031217.2801549-1-juzhe.zhong@rivai.ai>
From: Kito Cheng <kito.cheng@gmail.com>
Date: Mon, 28 Aug 2023 11:48:07 +0800
Message-ID: <CA+yXCZBEh_b1fCuw4=8KKnf-HuOrwcGMQKGSrp9sfCFPa5spJw@mail.gmail.com>
Subject: Re: [PATCH] RISC-V: Enable vec_init testsuite for RVV VLA vectorization
To: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Cc: gcc-patches@gcc.gnu.org, lehua.ding@rivai.ai, kito.cheng@sifive.com
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> @@ -11100,6 +11101,15 @@ proc check_vect_support_and_set_flags { } {
>          }
>      } elseif [istarget amdgcn-*-*] {
>          set dg-do-what-default run
> +    } elseif [istarget riscv64-*-*] {
> +       if [check_effective_target_riscv_vector_hw] {
> +           lappend DEFAULT_VECTCFLAGS "--param" "riscv-autovec-preference=scalable"
> +           set dg-do-what-default run
> +       } else {
> +           lappend DEFAULT_VECTCFLAGS "-march=rv64gcv_zfh" "-mabi=lp64d"

I would suggest using `-march=rv64gcv` or `-march=rv64gcv_zvfh_zfh`?
Just zfh is not meaningful I think.