From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ua1-x935.google.com (mail-ua1-x935.google.com [IPv6:2607:f8b0:4864:20::935]) by sourceware.org (Postfix) with ESMTPS id 0B28A3858D1E for ; Wed, 19 Apr 2023 00:54:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0B28A3858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ua1-x935.google.com with SMTP id a26so6209785uak.5 for ; Tue, 18 Apr 2023 17:54:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1681865663; x=1684457663; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=2BkzeYA9ih7ftKCtQsOVHmHp4hHuiR6cUofe+gy+fFw=; b=K8EL4ruF2cwy7VUppZvQ1OmGv6Lmu0Zn68ssR8yvTFTwXGCG4gdZbfEziwnb1pNPCp GWz8LRBwyhE0yuAp+YQJMfKBC/Scl44ri9Z2eKxqNnk7ixtQImSdP8q2DCcJsPHT/E7K +Hk+Kz0nV3QCgdJENZMoqe3aevMv3vCgixzOLsSViYvNAkbkQVB+qOVE4wzW//uAiU6s Ra3SlLwxwzys2Ta+CyKdA4/nyg4jxbm8l1+pOMdKz5/okD71y0jMZ0zfFpmKZ6gwA33i 8tfOGd87IlpHWhmVdSS5zkjUMRlsD0gjqyZcVIH0qbzZOluGpt6asrO55LGqdFJ06tMi dy3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681865663; x=1684457663; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=2BkzeYA9ih7ftKCtQsOVHmHp4hHuiR6cUofe+gy+fFw=; b=f6uGG1j0whUcf2kk4DiHdn6sCl0XfDI3oUXNI/Tl8plr7YPWrBkVLlogE48OL/Ku0V eNUV5uSfqIner+GVwM3qnWmUuOBoA2I2iCyL4PC6sHJ0wpyX0aUqWbfOf2bpy5NY/gD8 fB2MSmKx/yiJRHriCjZEquIvFV4CoVPSYi1PyS9luv9cXp6Z+iDecvQ1pzuor6tdrfrh gvX8W/Zgb80t7f5Q/Rb/RlnL9CMCRftOFGarMuWo6r4rGmW0G3xRsNMsCXAKs9DHyUwZ Td150nMyTTgSOHc5BRv9CzM9bzsOm5m73oUq+YxDnoqCuiWW5x3h3G+ub/ASjVdL6yzi Fb2Q== X-Gm-Message-State: AAQBX9fSU0Q6UgLof7NpqVC3EueRkS3GN2FnS8AtS3eJaEZmLP+Sx7IU PnvfgdEHqg1F05CZXBZOwEZU7GaPPRNQq4ctLhE= X-Google-Smtp-Source: AKy350Z3w9iD+4WgFjGusuVYxBBHfAVCrHfyRU51k9ObPNUo0i420U54XsSnno0r3JkMZU/wDm5sQ5FhkBYk2u2kTPQ= X-Received: by 2002:a1f:c1c9:0:b0:43f:c805:e0a7 with SMTP id r192-20020a1fc1c9000000b0043fc805e0a7mr6757110vkf.9.1681865663085; Tue, 18 Apr 2023 17:54:23 -0700 (PDT) MIME-Version: 1.0 References: <20230417183701.2249183-1-collison@rivosinc.com> <20230417183701.2249183-2-collison@rivosinc.com> In-Reply-To: <20230417183701.2249183-2-collison@rivosinc.com> From: Kito Cheng Date: Wed, 19 Apr 2023 08:54:11 +0800 Message-ID: Subject: Re: [PATCH v4 01/10] RISC-V: Add new predicates and function prototypes To: Michael Collison Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Could you please move the new function declarations and new code to the patch where they are being used? > +/* RVV vector register sizes. */ > +enum riscv_vector_bits_enum > +{ > + RVV_SCALABLE, > + RVV_NOT_IMPLEMENTED = RVV_SCALABLE, > + RVV_64 = 64, > + RVV_128 = 128, > + RVV_256 = 256, > + RVV_512 = 512, > + RVV_1024 = 1024, > + RVV_2048 = 2048, > + RVV_4096 = 4096, > + RVV_8192 = 8192, > + RVV_16384 = 16384, > + RVV_32768 = 32768, > + RVV_65536 = 65536 > +}; I think this is not necessary for the VLA vectorizer? > +Enum > +Name(riscv_vector_lmul) Type(enum riscv_vector_lmul_enum) > +The possible vectorization factor: > + > +EnumValue > +Enum(riscv_vector_lmul) String(1) Value(RVV_LMUL1) > + > +EnumValue > +Enum(riscv_vector_lmul) String(2) Value(RVV_LMUL2) > + > +EnumValue > +Enum(riscv_vector_lmul) String(4) Value(RVV_LMUL4) > + > +EnumValue > +Enum(riscv_vector_lmul) String(8) Value(RVV_LMUL8) I would like to introduce this option later, it's used for fine tuning, VLA vectorizer should be able to work without this tuning option. > +mriscv-vector-lmul= > +Target RejectNegative Joined Enum(riscv_vector_lmul) Var(riscv_vector_lmul) Init(RVV_LMUL1) > +-mriscv-vector-lmul= Set the vf using lmul in auto-vectorization. > + Same question for this