From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vk1-xa2b.google.com (mail-vk1-xa2b.google.com [IPv6:2607:f8b0:4864:20::a2b]) by sourceware.org (Postfix) with ESMTPS id 6FCCC3858D3C for ; Tue, 25 Jul 2023 11:00:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 6FCCC3858D3C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-vk1-xa2b.google.com with SMTP id 71dfb90a1353d-4863a951922so353820e0c.1 for ; Tue, 25 Jul 2023 04:00:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690282846; x=1690887646; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=b3pArbPxoQ3HSX/kakH27lHhbsEWmzBxbrCq660t3y8=; b=Bv9m5D6/M17+M1/7EH8VAIVeMuZzWiM0pH56CHsKI+Ib0XVDyQ2k9rNJdj0Bfk+9k+ IheNfCE0X1+mzv/Rp0VpD3zMMEbw2gqmJw5fKgvnGk+7jkH0GhOTkbxX5xqWqTrnjjJF gs530liHLT11NmEJvALupuVqNaDxrsKdI8K7hz9AFcPAGFq5eVkWkrLHlm0BEW8ZONIo cWqXIhE0SA6P82a47NJ5jKUbM/GBOZ9s+zaINx0YIGsWLtck3SrvVBiJFUNcOfIceSZO Z1hP/1izledpPvgshfXR9cjocb5YxqcF8z4GYIx0p8juRrF91UqoG6s//n0lXgREdSNY gQfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690282846; x=1690887646; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=b3pArbPxoQ3HSX/kakH27lHhbsEWmzBxbrCq660t3y8=; b=DTi7FjEbCHnsolLXLxHlDaenk0wvaxLPc2EcxVZ6gl49wy6O5Mtow+Waf8ce2Ep51r 3ZndXCdWg2Y3c8tLYcPJAxpCLKCzFqqaQAL+4D0+TfhLrIyNL6ERxEJth5UlDmJylrVK DDR0s2M59Cvwx7Rg5tto2/dOF6XjDZ/qAqBmH4W/rbpsBTo69pT0NgvNa6C4EPbCw/7p 9nSZ9I4vb9mEJqhoXZek5xurSPEWlJZDiNpXkz+SNfd+8fYf958o7AUr29ShQns+Tuv2 KxR16e6/o0J9ZyOGFUzkL93DoP1N8rFaXdBfrcxXne0NP+EPpCjjdhpD2XULYDkKyGzW RWhg== X-Gm-Message-State: ABy/qLZYk1OWSOIlqewspzYU6zcok+g9R75t58nlenC3B9KgMmAsdAZJ 4J4+3QHjr9dWcB6HhN0weacUxaMZerYIvhk06zs= X-Google-Smtp-Source: APBJJlFgx2C1PminKtmK5IZ9sj3+zjqMLRgY7YIJdz5b+v1mZOERaIRiMi9aUgQZwLoJbWLYnEQM1i1BQB0vlCO6RoA= X-Received: by 2002:a1f:19ca:0:b0:481:5218:ad27 with SMTP id 193-20020a1f19ca000000b004815218ad27mr466238vkz.3.1690282845519; Tue, 25 Jul 2023 04:00:45 -0700 (PDT) MIME-Version: 1.0 References: <20230725063910.1568-1-jinma@linux.alibaba.com> <20230725072816.1629-1-jinma@linux.alibaba.com> In-Reply-To: <20230725072816.1629-1-jinma@linux.alibaba.com> From: Kito Cheng Date: Tue, 25 Jul 2023 19:00:32 +0800 Message-ID: Subject: Re: [PATCH v2] RISC-V: Fixbug for fsflags instruction error using immediate. To: Jin Ma Cc: GCC Patches , Jeff Law , Palmer Dabbelt , "richard.sandiford" , Philipp Tomsich , =?UTF-8?Q?Christoph_M=C3=BCllner?= , "jinma.contrib" Content-Type: multipart/alternative; boundary="00000000000093c5e006014da420" X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,HTML_MESSAGE,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --00000000000093c5e006014da420 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Jin Ma via Gcc-patches =E6=96=BC 2023=E5=B9=B47= =E6=9C=8825=E6=97=A5 =E9=80=B1=E4=BA=8C 15:29 =E5=AF=AB=E9=81=93=EF=BC=9A > The pattern mistakenly believes that fsflags can use immediate numbers, > but in fact it does not support it. Immediate numbers should use fsflagsi. > > For example: > __builtin_riscv_fsflags(4); > > The following error occurred. > /tmp/ccoWdWqT.s: Assembler messages: > /tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4' > > gcc/ChangeLog: > > * config/riscv/riscv.md: Likewise. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/fsflags.c: New test. > --- > gcc/config/riscv/riscv.md | 8 +++++--- > gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++ > 2 files changed, 21 insertions(+), 3 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c > > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md > index 4615e811947..1ec85e30d7e 100644 > --- a/gcc/config/riscv/riscv.md > +++ b/gcc/config/riscv/riscv.md > @@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr" > "frcsr\t%0") > > (define_insn "riscv_fscsr" > - [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] > UNSPECV_FSCSR)] > + [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] > UNSPECV_FSCSR)] > "TARGET_HARD_FLOAT || TARGET_ZFINX" > "fscsr\t%0") > > @@ -3085,9 +3085,11 @@ (define_insn "riscv_frflags" > "frflags\t%0") > > (define_insn "riscv_fsflags" > - [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] > UNSPECV_FSFLAGS)] > + [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r,K")] > UNSPECV_FSFLAGS)] > "TARGET_HARD_FLOAT || TARGET_ZFINX" > - "fsflags\t%0") > + "@ > + fsflags\t%0 > + fsflagsi\t%0") > You can be use fsflags%i0, you can reference addsi pattern. > (define_insn "*riscv_fsnvsnan2" > [(unspec_volatile [(match_operand:ANYF 0 "register_operand" "f") > diff --git a/gcc/testsuite/gcc.target/riscv/fsflags.c > b/gcc/testsuite/gcc.target/riscv/fsflags.c > new file mode 100644 > index 00000000000..74a97b8a7c7 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/fsflags.c > @@ -0,0 +1,16 @@ > +/* Verify that fsflags is using the correct register or immediate. */ > +/* { dg-do compile } */ > +/* { dg-require-effective-target hard_float } */ > +/* { dg-options "-O" } */ > + > +void foo1 (int a) > +{ > + __builtin_riscv_fsflags(a); > +} > +void foo2 () > +{ > + __builtin_riscv_fsflags(4); > +} > + > +/* { dg-final { scan-assembler-times "fsflags\t" 1 } } */ > +/* { dg-final { scan-assembler-times "fsflagsi\t" 1 } } */ > -- > 2.17.1 > > --00000000000093c5e006014da420--