From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vk1-xa34.google.com (mail-vk1-xa34.google.com [IPv6:2607:f8b0:4864:20::a34]) by sourceware.org (Postfix) with ESMTPS id 972393858D1E for ; Tue, 25 Apr 2023 13:24:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 972393858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-vk1-xa34.google.com with SMTP id 71dfb90a1353d-440445a48c7so2182147e0c.1 for ; Tue, 25 Apr 2023 06:24:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682429044; x=1685021044; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=QQCVoqRxg56AeQfnYqLcaAoEaGpL+a89UpmoqyBAbD4=; b=Y3Yr8owE/kX1DUAJRBvMeOGGUVumGTLUHTXhXbUvGBCa+WXlY1m/aaRL6Cpr6cW2Um D8aoN2bCVvEzAPJe0ZRH91kEPtXGFA3ye1LwQN3UreE889BdLONlSNE7hWycVaQrUu9g hxbaFqg/Qg94ntACB0L2Zsf8Bezy9FiUuzSfTgQXg81bS0OiE9mtfj8zOHCn/KZNwF42 mSW9mOTwt1AS2zgj+bWNGwxVUzvvQa2C0LgO97v2/mPWdGo4cwAVEUT2Sq4cM6oWPyuW Yyz6euIdCfMHXitxvMHMC/uTtdOahpRXhkJv6a1pSwbvkOHupGhbBHeHyanxAoqTC6x/ NzPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682429044; x=1685021044; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=QQCVoqRxg56AeQfnYqLcaAoEaGpL+a89UpmoqyBAbD4=; b=CVO3LtdZrefAbWNUPtJggQvlqewmxG5U2dembJKqjEAtb5wYXgW+rmGMjQcJTPW+kW FGTqT+IL8MABc2H8xxoqXJpXsq+pVEg3UN3N5Flhrvvx/5kErDu9jWG3IUo9qMOSoIir vC2oMG6oeZTUXGwODfRS5jd8ire8zP9GldAvd9hPCOwvSUErqGCxEUKVz7cbJbmL8IX6 iqq4fndiUWYuN7r8AL44m41xBO8YWrIAxnsqxslPBAp7xgohle09pkhuo4rafV3aUEvA nmeAFrDRwo+7scgFerIBtqP0Grt2j3g9BYuX77CIaXNbYlau0Yq/G3JB4zTSa6578Xwo cPTw== X-Gm-Message-State: AAQBX9f/7zfdkWADWm4e0xSs4DZkNUetGIN4uhXlS8w0ZgIgsiHmj1sE yI0QNIYPvJn9vXYuZYyqN+OXMPri+3nplmw+LGM= X-Google-Smtp-Source: AKy350bQwIl6k/ycqxLZgrEAHBpBiNKB1VHSih6BBLpKkBJypH2UQ/TX1HWy2Vk7DdRH3u/YIYMqAdFMyHo8urNI4L4= X-Received: by 2002:a1f:43d1:0:b0:443:ddb3:1512 with SMTP id q200-20020a1f43d1000000b00443ddb31512mr4581723vka.3.1682429043703; Tue, 25 Apr 2023 06:24:03 -0700 (PDT) MIME-Version: 1.0 References: <20230307091204.1498-1-shihua@iscas.ac.cn> In-Reply-To: <20230307091204.1498-1-shihua@iscas.ac.cn> From: Kito Cheng Date: Tue, 25 Apr 2023 21:23:52 +0800 Message-ID: Subject: Re: [RFC] RISC-V: Support risc-v bfloat16 This patch support bfloat16 in riscv like x86_64 and arm. To: Liao Shihua Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi ShiHua: Thanks for your contribution to the zfbfmin extension :) General comments: - Add zfbfmin to riscv_ext_version_table - Add test case to verify the -march is accepted. - Add testcase to test argument passing. - Add testcase for operations. - Add testcase for compares. > +(define_insn "*movbf_softfloat" > + [(set (match_operand:BF 0 "nonimmediate_operand" "=f, r,r,m,*f,*r") > + (match_operand:BF 1 "move_operand" " f,Gr,m,r,*r,*f"))] > + "!TARGET_ZFHMIN Should be TARGET_ZFBFMIN? > @@ -3192,7 +3192,11 @@ riscv_emit_float_compare (enum rtx_code *code, rtx *op0, rtx *op1) > else if (GET_MODE (cmp_op0) == HFmode && TARGET_64BIT) \ > emit_insn (gen_f##CMP##_quiethfdi4 (*op0, cmp_op0, cmp_op1)); \ > else if (GET_MODE (cmp_op0) == HFmode) \ > - emit_insn (gen_f##CMP##_quiethfsi4 (*op0, cmp_op0, cmp_op1)); \ > + emit_insn (gen_f##CMP##_quietbfsi4 (*op0, cmp_op0, cmp_op1)); \ > + else if (GET_MODE (cmp_op0) == BFmode && TARGET_64BIT) \ > + emit_insn (gen_f##CMP##_quietbfdi4 (*op0, cmp_op0, cmp_op1)); \ > + else if (GET_MODE (cmp_op0) == BFmode) \ > + emit_insn (gen_f##CMP##_quietbfsi4 (*op0, cmp_op0, cmp_op1)); \ > else \ > gcc_unreachable (); \ > *op1 = const0_rtx; \ Do we really need this? I thought we'll always promote to SF before they compare?