From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ua1-x92d.google.com (mail-ua1-x92d.google.com [IPv6:2607:f8b0:4864:20::92d]) by sourceware.org (Postfix) with ESMTPS id 48134385840D for ; Fri, 28 Apr 2023 07:24:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 48134385840D Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ua1-x92d.google.com with SMTP id a1e0cc1a2514c-76fd0036c7fso2727833241.3 for ; Fri, 28 Apr 2023 00:24:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682666639; x=1685258639; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=T8dXIicim0+RbvzjtH7wyIvgtDLS3n9RaJaNOhae9EI=; b=ZQwCnnyP2MidluFzAY4KnzvFPQsUyzX0s4O2XJyT4ljMWzlSwEQIYRVne/7BZ/6AJB qHJbV7j5zyjBV6/pAoo+EJYn4vriws1pUfRiV6u0SebKrtnfgkJcnprBFQ3D7I5jLdom wHdCFGiLC/PkiB9Qzgn6EhTypQvvrwqmmw4i3wOF7426lZW6M3qZK3GK5UWQ2m4ItiF4 qGSg+F4F8ulYMlripgN/4xBaYOE/6ReWnCb4lYvhLP6lODmMfPfHxAleksTHsPMvzGIO 9vY9r5/De7eq6hTOz8K8k+BJ0M+2AQJt4gorULS/lXNy7mU436bOfE3CeoFPX812IdcN ECNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682666639; x=1685258639; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=T8dXIicim0+RbvzjtH7wyIvgtDLS3n9RaJaNOhae9EI=; b=K4LpMF8Pggmx4Wh3v7BIgC1ZMsDjxkeb8OXFUzC6AKWqDp4U4jAHvODnq9UmDHlmp4 kKgYiXgivX6AYxxfXWVZUVbK0eohhKibrgcTb3bzR59AJXf/zzggxBsEYYynZXZAcS9e BkqWkwzNOsNnauVhvA0NsULXDLlUszO3zDETeu8d/ar+DD/srTqy6d34AMJyD3JDrKCy E9S4x6WBk1dBzn93JjpbfRwJYpDusloZ7hsWd1L8bU8gVSUWp3JBklxwAcrQw3HTKoVM O5Dg9Eic41cecRU5BWDgEU8lXSJK/r74SdoyxlggszoRsVSUzZIGZSN3jlUmY+qIWrYh lK+w== X-Gm-Message-State: AC+VfDzbAXr8DBeTM7FKkwNO97KprOiMyhqsZpIxpWIVHL4J6wPbeC90 SIjlp9RSNGRnbbJ1XkatCinn1EMbYxOIZIQL3r4= X-Google-Smtp-Source: ACHHUZ6yByAyr1h2mgWHepIoPhmEWFBVbPDLpCbzzLLNWZIUm2ChOFOUwLlNvJCPYWDhnGtYMkn9VAYtq/SXJYAkCbA= X-Received: by 2002:a67:f7d1:0:b0:430:4241:d7a2 with SMTP id a17-20020a67f7d1000000b004304241d7a2mr2172737vsp.1.1682666639391; Fri, 28 Apr 2023 00:23:59 -0700 (PDT) MIME-Version: 1.0 References: <20230428061210.2988035-1-christoph.muellner@vrull.eu> <20230428061210.2988035-8-christoph.muellner@vrull.eu> In-Reply-To: <20230428061210.2988035-8-christoph.muellner@vrull.eu> From: Kito Cheng Date: Fri, 28 Apr 2023 15:23:48 +0800 Message-ID: Subject: Re: [PATCH 07/11] riscv: Move address classification info types to riscv-protos.h To: Christoph Muellner Cc: gcc-patches@gcc.gnu.org, Kito Cheng , Jim Wilson , Palmer Dabbelt , Andrew Waterman , Philipp Tomsich , Cooper Qu , Lifang Xia , Yunhai Shang , Zhiwei Liu Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_STOCKGEN,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: OK :) On Fri, Apr 28, 2023 at 2:15=E2=80=AFPM Christoph Muellner wrote: > > From: Christoph M=C3=BCllner > > enum riscv_address_type and struct riscv_address_info are used > to store address classification information. Let's move this types > into our common header file in order to share them with other > compilation units. > > This is a non-functional change without any intendet side-effects. > > gcc/ChangeLog: > > * config/riscv/riscv-protos.h (enum riscv_address_type): > New location of type definition. > (struct riscv_address_info): Likewise. > * config/riscv/riscv.cc (enum riscv_address_type): > Old location of type definition. > (struct riscv_address_info): Likewise. > > Signed-off-by: Christoph M=C3=BCllner > --- > gcc/config/riscv/riscv-protos.h | 43 +++++++++++++++++++++++++++++++++ > gcc/config/riscv/riscv.cc | 43 --------------------------------- > 2 files changed, 43 insertions(+), 43 deletions(-) > > diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-pro= tos.h > index 5244e8dcbf0..628c64cf628 100644 > --- a/gcc/config/riscv/riscv-protos.h > +++ b/gcc/config/riscv/riscv-protos.h > @@ -35,6 +35,49 @@ enum riscv_symbol_type { > }; > #define NUM_SYMBOL_TYPES (SYMBOL_TLS_GD + 1) > > +/* Classifies an address. > + > + ADDRESS_REG > + A natural register + offset address. The register satisfies > + riscv_valid_base_register_p and the offset is a const_arith_opera= nd. > + > + ADDRESS_LO_SUM > + A LO_SUM rtx. The first operand is a valid base register and > + the second operand is a symbolic address. > + > + ADDRESS_CONST_INT > + A signed 16-bit constant address. > + > + ADDRESS_SYMBOLIC: > + A constant symbolic address. */ > +enum riscv_address_type { > + ADDRESS_REG, > + ADDRESS_LO_SUM, > + ADDRESS_CONST_INT, > + ADDRESS_SYMBOLIC > +}; > + > +/* Information about an address described by riscv_address_type. > + > + ADDRESS_CONST_INT > + No fields are used. > + > + ADDRESS_REG > + REG is the base register and OFFSET is the constant offset. > + > + ADDRESS_LO_SUM > + REG and OFFSET are the operands to the LO_SUM and SYMBOL_TYPE > + is the type of symbol it references. > + > + ADDRESS_SYMBOLIC > + SYMBOL_TYPE is the type of symbol that the address references. *= / > +struct riscv_address_info { > + enum riscv_address_type type; > + rtx reg; > + rtx offset; > + enum riscv_symbol_type symbol_type; > +}; > + > /* Routines implemented in riscv.cc. */ > extern enum riscv_symbol_type riscv_classify_symbolic_expression (rtx); > extern bool riscv_symbolic_constant_p (rtx, enum riscv_symbol_type *); > diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc > index 92043236b17..8388235d8cc 100644 > --- a/gcc/config/riscv/riscv.cc > +++ b/gcc/config/riscv/riscv.cc > @@ -81,28 +81,6 @@ along with GCC; see the file COPYING3. If not see > /* True if bit BIT is set in VALUE. */ > #define BITSET_P(VALUE, BIT) (((VALUE) & (1ULL << (BIT))) !=3D 0) > > -/* Classifies an address. > - > - ADDRESS_REG > - A natural register + offset address. The register satisfies > - riscv_valid_base_register_p and the offset is a const_arith_opera= nd. > - > - ADDRESS_LO_SUM > - A LO_SUM rtx. The first operand is a valid base register and > - the second operand is a symbolic address. > - > - ADDRESS_CONST_INT > - A signed 16-bit constant address. > - > - ADDRESS_SYMBOLIC: > - A constant symbolic address. */ > -enum riscv_address_type { > - ADDRESS_REG, > - ADDRESS_LO_SUM, > - ADDRESS_CONST_INT, > - ADDRESS_SYMBOLIC > -}; > - > /* Information about a function's frame layout. */ > struct GTY(()) riscv_frame_info { > /* The size of the frame in bytes. */ > @@ -182,27 +160,6 @@ struct riscv_arg_info { > unsigned int fpr_offset; > }; > > -/* Information about an address described by riscv_address_type. > - > - ADDRESS_CONST_INT > - No fields are used. > - > - ADDRESS_REG > - REG is the base register and OFFSET is the constant offset. > - > - ADDRESS_LO_SUM > - REG and OFFSET are the operands to the LO_SUM and SYMBOL_TYPE > - is the type of symbol it references. > - > - ADDRESS_SYMBOLIC > - SYMBOL_TYPE is the type of symbol that the address references. *= / > -struct riscv_address_info { > - enum riscv_address_type type; > - rtx reg; > - rtx offset; > - enum riscv_symbol_type symbol_type; > -}; > - > /* One stage in a constant building sequence. These sequences have > the form: > > -- > 2.40.1 >