From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vk1-xa2c.google.com (mail-vk1-xa2c.google.com [IPv6:2607:f8b0:4864:20::a2c]) by sourceware.org (Postfix) with ESMTPS id 8A3CB3858D28 for ; Mon, 7 Aug 2023 08:51:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8A3CB3858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-vk1-xa2c.google.com with SMTP id 71dfb90a1353d-48715f54356so1359502e0c.1 for ; Mon, 07 Aug 2023 01:51:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1691398293; x=1692003093; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=L7m1iVE1DMOqMJN1P5VwS1yiRbSdEVQyqbC8U6klPmE=; b=abFFr47bio1yCi9Pgxq2clZevhW4bFZt4BQiJqOwdLQpHQGrJhu1FqUj5AI/ptmk5o KSwyUEvtdY9azqz4fXryVm+DpPV8hWUnwpriot9lQuZ0vh59HCMOPdlFu/K0U/mHwKJr qk7WfKgyfFMSz74YDSMz1+BUkuoHATCuEKyHMl+BAr/seh68K+MtjLP51Sd4xhJM3tow xBrxZq+s66pKnI8azZxvvsiMMspCYAnevajz+rgsA4TyJDAN3leARZq6+Sryf5urBnxA TviOvfqJ5GyXsawu4hTB8sjHE6evnINt2cv0u116cbhbkTRfB4aCddU4Wy7gFkE5L58/ zlsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691398293; x=1692003093; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=L7m1iVE1DMOqMJN1P5VwS1yiRbSdEVQyqbC8U6klPmE=; b=T/85xLd9LFVGAfwHbUt/p7quPxYEDPXqPWClGOo4cLl03Liej1QQgvpbjz22P1Yf07 Ia/q4zFWuSvY7K6uz5uCnTwQK7byrgSA+LTsELJuwygbUvEhK6Cv55Odj5QeGaLMCsPC sdP3mJR3uXcPeQQ9OAS31MByaTpHo4KBg4+YnHkwnTzoyaK7/SvF4rnnwJLtl2xEZEsT LaW22kazuIsS9EiKQtkJttJTmyz/yFMVraGe5TssV9PQGK+pttx9LwBwEPnojWY3VfdS FU4sR7706uhv2QJKAb1Ut0jowjFcBTqFqlAHbqJPBtzUknAPGvsr71wjrnd5nS9wXsjI eBQA== X-Gm-Message-State: AOJu0YyuCLsrNXwxVO5/cYsRgRr69aPOHaz1YiFMD6W26cSi1zUy8fL3 O8AcoG6pvpmDAXMu6qsd+hOvfax+tNRWElxJv/s= X-Google-Smtp-Source: AGHT+IGnPxEuGFF6u3EjXFpMI9W7CVRv3wG1P+U78W++4CjzjJ1kTAF8b+QVfja5Er9N0c9u4ic6toZ/VhddfNgEKrk= X-Received: by 2002:a67:e312:0:b0:447:c760:7245 with SMTP id j18-20020a67e312000000b00447c7607245mr4128916vsf.26.1691398292735; Mon, 07 Aug 2023 01:51:32 -0700 (PDT) MIME-Version: 1.0 References: <20230720090126.2976103-1-lehua.ding@rivai.ai> <20230720090126.2976103-2-lehua.ding@rivai.ai> In-Reply-To: <20230720090126.2976103-2-lehua.ding@rivai.ai> From: Kito Cheng Date: Mon, 7 Aug 2023 16:51:21 +0800 Message-ID: Subject: Re: [PATCH 1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns To: Lehua Ding Cc: gcc-patches@gcc.gnu.org, juzhe.zhong@rivai.ai, rdapp.gcc@gmail.com, palmer@rivosinc.com, jeffreyalaw@gmail.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Thanks for the high quality patch, it's generally LGTM, only a few minor comments :) > + /* The number and alignment of vector registers need for this scalable vector > + argument. When the mode size is less than a full vector, we use 1 vector > + register to pass. Just call TARGET_HARD_REGNO_NREGS for the number > + infomation. */ gmail told me here is a typo: information :P > + int nregs = riscv_hard_regno_nregs (V_ARG_FIRST, mode); > + int LMUL = riscv_v_ext_tuple_mode_p (mode) > + ? nregs / riscv_vector::get_nf (mode) > + : nregs; > + int arg_reg_start = V_ARG_FIRST - V_REG_FIRST; > + int arg_reg_end = V_ARG_LAST - V_REG_FIRST; > + int aligned_reg_start = (arg_reg_start + LMUL - 1) & -LMUL; Use` ROUND_UP (arg_reg_start, LMUL)`